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Convert CONFIG_TEGRA_ENABLE_UARTA et al to Kconfig

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This converts the following to Kconfig:
   CONFIG_TEGRA_ENABLE_UARTA
   CONFIG_TEGRA_ENABLE_UARTB
   CONFIG_TEGRA_ENABLE_UARTC
   CONFIG_TEGRA_ENABLE_UARTD
   CONFIG_TEGRA_SPI
   CONFIG_TEGRA_UARTA_GPU
   CONFIG_TEGRA_UARTA_SDIO1
   CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
   CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-12-02 16:42:45 -05:00
parent 32b7e39db4
commit d14f3f2725
38 changed files with 49 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
arch/arm/mach-tegra/Kconfig
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@ -177,6 +177,29 @@ source "arch/arm/mach-tegra/tegra124/Kconfig"
source "arch/arm/mach-tegra/tegra210/Kconfig"
source "arch/arm/mach-tegra/tegra186/Kconfig"
config TEGRA_SPI
def_bool y
depends on TEGRA20_SFLASH || TEGRA20_SLINK || TEGRA114_SPI
choice
prompt "UART to use for console"
depends on TEGRA_PINCTRL
default TEGRA_ENABLE_UARTA
config TEGRA_ENABLE_UARTA
bool "Use UARTA"
config TEGRA_ENABLE_UARTB
bool "Use UARTB"
config TEGRA_ENABLE_UARTC
bool "Use UARTC"
config TEGRA_ENABLE_UARTD
bool "Use UARTD"
endchoice
config TEGRA_GPU
bool "Enable setting up the GPU"
depends on TEGRA124 || TEGRA210

8
arch/arm/mach-tegra/tegra20/Kconfig
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@ -10,6 +10,12 @@ config TEGRA_PMU
config TEGRA_CLOCK_SCALING
bool
config TEGRA_UARTA_GPU
bool
config TEGRA_UARTA_SDIO1
bool
choice
prompt "Tegra20 board select"
optional
@ -43,6 +49,7 @@ config TARGET_TEC
config TARGET_TRIMSLICE
bool "Compulab TrimSlice board"
select BOARD_LATE_INIT
select TEGRA_UARTA_GPU
config TARGET_VENTANA
bool "NVIDIA Tegra20 Ventana evaluation board"
@ -51,6 +58,7 @@ config TARGET_VENTANA
config TARGET_COLIBRI_T20
bool "Toradex Colibri T20 board"
select BOARD_LATE_INIT
select TEGRA_UARTA_SDIO1
endchoice

8
arch/arm/mach-tegra/tegra30/Kconfig
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@ -1,5 +1,11 @@
if TEGRA30
config TEGRA_VDD_CORE_TPS62361B_SET3
bool
config TEGRA_VDD_CORE_TPS62366A_SET1
bool
choice
prompt "Tegra30 board select"
optional
@ -11,10 +17,12 @@ config TARGET_APALIS_T30
config TARGET_BEAVER
bool "NVIDIA Tegra30 Beaver evaluation board"
select BOARD_LATE_INIT
select TEGRA_VDD_CORE_TPS62366A_SET1
config TARGET_CARDHU
bool "NVIDIA Tegra30 Cardhu evaluation board"
select BOARD_LATE_INIT
select TEGRA_VDD_CORE_TPS62361B_SET3
config TARGET_COLIBRI_T30
bool "Toradex Colibri T30 board"

1
configs/cei-tk1-som_defconfig
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@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
CONFIG_TEGRA124=y
CONFIG_TARGET_CEI_TK1_SOM=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_TEGRA_GPU=y
CONFIG_ARMV7_PSCI_0_1=y
CONFIG_SYS_LOAD_ADDR=0x81000000

1
configs/dalmore_defconfig
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@ -11,6 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
CONFIG_TEGRA114=y
CONFIG_TARGET_DALMORE=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y

1
configs/harmony_defconfig
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@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (Harmony) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_HARMONY=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_STDIO_DEREGISTER=y

1
configs/jetson-tk1_defconfig
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@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
CONFIG_TEGRA124=y
CONFIG_TARGET_JETSON_TK1=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y

1
configs/medcom-wide_defconfig
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@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_MEDCOM_WIDE=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y

1
configs/plutux_defconfig
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@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (Plutux) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_PLUTUX=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y

1
configs/seaboard_defconfig
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@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_SEABOARD=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y

1
configs/tec-ng_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # "
CONFIG_TEGRA30=y
CONFIG_TARGET_TEC_NG=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y

1
configs/tec_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (TEC) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_TEC=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y

1
configs/ventana_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
CONFIG_TEGRA20=y
CONFIG_TARGET_VENTANA=y
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y

1
include/configs/apalis-tk1.h
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@ -13,7 +13,6 @@
#include "tegra124-common.h"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define FDT_MODULE "apalis-v1.2"

1
include/configs/apalis_t30.h
View File

@ -20,7 +20,6 @@
* Apalis UART3: NVIDIA UARTB
* Apalis UART4: NVIDIA UARTC
*/
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \

4
include/configs/beaver.h
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@ -10,14 +10,10 @@
#include "tegra30-common.h"
/* VDD core PMIC */
#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

4
include/configs/cardhu.h
View File

@ -10,9 +10,6 @@
#include "tegra30-common.h"
/* VDD core PMIC */
#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
@ -21,7 +18,6 @@
"fdtfile=tegra30-cardhu-a04.dtb\0"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

1
include/configs/cei-tk1-som.h
View File

@ -19,7 +19,6 @@
#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

2
include/configs/colibri_t20.h
View File

@ -11,8 +11,6 @@
#include "tegra20-common.h"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_TEGRA_UARTA_SDIO1
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* NAND support */

1
include/configs/colibri_t30.h
View File

@ -21,7 +21,6 @@
* Colibri UART-B: NVIDIA UARTD
* Colibri UART-C: NVIDIA UARTB
*/
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \

1
include/configs/dalmore.h
View File

@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/harmony.h
View File

@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
/* UARTD: keyboard satellite board UART, default */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

1
include/configs/jetson-tk1.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

1
include/configs/medcom-wide.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

1
include/configs/nyan-big.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

1
include/configs/p2371-0000.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/p2371-2180.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/p2571.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/p3450-0000.h
View File

@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Only MMC/PXE/DHCP for now, add USB back in later when supported */
#define BOOT_TARGET_DEVICES(func) \

1
include/configs/paz00.h
View File

@ -16,7 +16,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/plutux.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

1
include/configs/seaboard.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/tec-ng.h
View File

@ -13,7 +13,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

1
include/configs/tec.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

4
include/configs/tegra-common-post.h
View File

@ -73,8 +73,4 @@
BOOTENV \
BOARD_EXTRA_ENV_SETTINGS
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
#define CONFIG_TEGRA_SPI
#endif
#endif /* __TEGRA_COMMON_POST_H */

2
include/configs/trimslice.h
View File

@ -14,8 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_TEGRA_UARTA_GPU
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */

1
include/configs/venice2.h
View File

@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

1
include/configs/ventana.h
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@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */