net: macb: Extend MACB driver for SiFive Unleashed board
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select different TX clock for 1000mbps vs 10/100mbps. This patch adds SiFive MACB compatible string and extends the MACB ethernet driver to change TX clock using TX_CLK_SEL register for SiFive MACB. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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@ -90,7 +90,8 @@ struct macb_dma_desc {
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struct macb_device {
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void *regs;
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unsigned int dma_burst_length;
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const struct macb_config *config;
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unsigned int rx_tail;
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unsigned int tx_head;
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@ -131,6 +132,8 @@ struct macb_device {
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struct macb_config {
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unsigned int dma_burst_length;
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int (*clk_init)(struct udevice *dev, ulong rate);
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};
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#ifndef CONFIG_DM_ETH
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@ -492,21 +495,38 @@ static int macb_phy_find(struct macb_device *macb, const char *name)
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* when operation failed.
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*/
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#ifdef CONFIG_DM_ETH
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static int macb_sifive_clk_init(struct udevice *dev, ulong rate)
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{
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fdt_addr_t addr;
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void *gemgxl_regs;
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addr = dev_read_addr_index(dev, 1);
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if (addr == FDT_ADDR_T_NONE)
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return -ENODEV;
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gemgxl_regs = (void __iomem *)addr;
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if (!gemgxl_regs)
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return -ENODEV;
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/*
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* SiFive GEMGXL TX clock operation mode:
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*
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* 0 = GMII mode. Use 125 MHz gemgxlclk from PRCI in TX logic
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* and output clock on GMII output signal GTX_CLK
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* 1 = MII mode. Use MII input signal TX_CLK in TX logic
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*/
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writel(rate != 125000000, gemgxl_regs);
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return 0;
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}
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int __weak macb_linkspd_cb(struct udevice *dev, unsigned int speed)
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{
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#ifdef CONFIG_CLK
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struct macb_device *macb = dev_get_priv(dev);
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struct clk tx_clk;
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ulong rate;
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int ret;
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/*
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* "tx_clk" is an optional clock source for MACB.
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* Ignore if it does not exist in DT.
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*/
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ret = clk_get_by_name(dev, "tx_clk", &tx_clk);
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if (ret)
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return 0;
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switch (speed) {
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case _10BASET:
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rate = 2500000; /* 2.5 MHz */
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@ -522,6 +542,17 @@ int __weak macb_linkspd_cb(struct udevice *dev, unsigned int speed)
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return 0;
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}
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if (macb->config->clk_init)
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return macb->config->clk_init(dev, rate);
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/*
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* "tx_clk" is an optional clock source for MACB.
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* Ignore if it does not exist in DT.
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*/
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ret = clk_get_by_name(dev, "tx_clk", &tx_clk);
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if (ret)
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return 0;
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if (tx_clk.dev) {
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ret = clk_set_rate(&tx_clk, rate);
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if (ret)
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@ -716,8 +747,9 @@ static void gmac_configure_dma(struct macb_device *macb)
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dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
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dmacfg |= GEM_BF(RXBS, buffer_size);
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if (macb->dma_burst_length)
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dmacfg = GEM_BFINS(FBLDO, macb->dma_burst_length, dmacfg);
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if (macb->config->dma_burst_length)
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dmacfg = GEM_BFINS(FBLDO,
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macb->config->dma_burst_length, dmacfg);
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dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
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dmacfg &= ~GEM_BIT(ENDIA_PKT);
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@ -1186,15 +1218,15 @@ static int macb_enable_clk(struct udevice *dev)
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static const struct macb_config default_gem_config = {
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.dma_burst_length = 16,
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.clk_init = NULL,
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};
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static int macb_eth_probe(struct udevice *dev)
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{
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const struct macb_config *macb_config;
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct macb_device *macb = dev_get_priv(dev);
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const char *phy_mode;
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__maybe_unused int ret;
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int ret;
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phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
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NULL);
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@ -1207,11 +1239,10 @@ static int macb_eth_probe(struct udevice *dev)
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macb->regs = (void *)pdata->iobase;
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macb_config = (struct macb_config *)dev_get_driver_data(dev);
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if (!macb_config)
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macb_config = &default_gem_config;
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macb->config = (struct macb_config *)dev_get_driver_data(dev);
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if (!macb->config)
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macb->config = &default_gem_config;
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macb->dma_burst_length = macb_config->dma_burst_length;
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#ifdef CONFIG_CLK
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ret = macb_enable_clk(dev);
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if (ret)
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@ -1274,6 +1305,12 @@ static int macb_eth_ofdata_to_platdata(struct udevice *dev)
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static const struct macb_config sama5d4_config = {
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.dma_burst_length = 4,
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.clk_init = NULL,
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};
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static const struct macb_config sifive_config = {
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.dma_burst_length = 16,
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.clk_init = macb_sifive_clk_init,
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};
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static const struct udevice_id macb_eth_ids[] = {
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@ -1283,6 +1320,8 @@ static const struct udevice_id macb_eth_ids[] = {
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{ .compatible = "atmel,sama5d3-gem" },
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{ .compatible = "atmel,sama5d4-gem", .data = (ulong)&sama5d4_config },
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{ .compatible = "cdns,zynq-gem" },
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{ .compatible = "sifive,fu540-c000-gem",
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.data = (ulong)&sifive_config },
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{ }
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};
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