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pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux

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RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding
bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
David Wu 2019-04-16 21:50:56 +08:00 committed by Kever Yang
parent 54e75702c4
commit cd8f00ce08
1 changed files with 9 additions and 1 deletions
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10
drivers/pinctrl/rockchip/pinctrl-rk3288.c
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@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
} }
} }
data = (mask << (bit + 16)); /* bank0 is special, there are no higher 16 bit writing bits. */
if (bank->bank_num == 0) {
regmap_read(regmap, reg, &data);
data &= ~(mask << bit);
} else {
/* enable the write to the equivalent lower bits */
data = (mask << (bit + 16));
}
data |= (mux & mask) << bit; data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data); ret = regmap_write(regmap, reg, data);