mxc_spi: Round up clock divider
Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
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clk_src = mxc_get_clock(MXC_CSPI_CLK);
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div = clk_src / max_hz;
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div = DIV_ROUND_UP(clk_src, max_hz);
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div = get_cspi_div(div);
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debug("clk %d Hz, div %d, real clk %d Hz\n",
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@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
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* The following computation is taken directly from Freescale's code.
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*/
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if (clk_src > max_hz) {
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pre_div = clk_src / max_hz;
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pre_div = DIV_ROUND_UP(clk_src, max_hz);
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if (pre_div > 16) {
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post_div = pre_div / 16;
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pre_div = 15;
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