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Merge with /home/wd/git/u-boot/master

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This commit is contained in:
Wolfgang Denk 2005-08-05 11:22:28 +02:00
commit cbf9c11728
21 changed files with 604 additions and 219 deletions
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24
CHANGELOG
View File

@ -46,6 +46,30 @@ Changes for U-Boot 1.1.3:
Eliminates the CONFIG_MPC8560 option entirely. Distributes the
new CONFIG_CPM2 option to each 8260 board.
* Adjust configuration of XENIAX board
(chip select and GPIO required for USB operation)
* Fix typos in cpu/85xx/start.S which caused DataTLB exception to be
routed to the Watchdog handler
Patch by Eugene Surovegin, 18 Jun 2005
* (re)enabled scsi commands do_scsi() and do_scsiboot()
Patch by Denis Peter, 06 Dec 2004
* Fix endianess problem in TFTP / NFS default filenames
Patch by Hiroshi Ito, 06 Dec 2004
* Ignore broadcast status bit in received frames in 8260 FCC ethernet
loopback test code
Patch by Murray Jensen, 18 Jul 2005
* Fix typo in mkconfig script (used == instead of =)
Patch by Murray Jensen, 18 Jul 2005
* Cleanup build problems on 64 bit build hosts
* Update MAINTAINERS file
* Patch by Stefan Roese, 01 Aug 2005:
- Major cleanup for AMCC eval boards Walnut, Bubinga, Ebony, Ocotea
(former IBM eval board). Please see "doc/README.AMCC-eval-boards-cleanup"

282
MAINTAINERS
View File

@ -129,112 +129,6 @@ Thomas Frieden <ThomasF@hyperion-entertainment.com>
AmigaOneG3SE MPC7xx
Frank Gottschling <fgottschling@eltec.de>
MHPC MPC8xx
BAB7xx MPC740/MPC750
Wolfgang Grandegger <wg@denx.de>
CCM MPC855
PN62 MPC8240
IPHASE4539 MPC8260
SCM MPC8260
Howard Gray <mvsensor@matrix-vision.de>
MVS1 MPC823
Bill Hargen <Bill_Hargen@Jabil.com>
BUBINGA405EP PPC405EP
Klaus Heydeck <heydeck@kieback-peter.de>
KUP4K MPC855
KUP4X MPC859
Murray Jensen <Murray.Jensen@cmst.csiro.au>
cogent_mpc8xx MPC8xx
cogent_mpc8260 MPC8260
hymod MPC8260
Brad Kemp <Brad.Kemp@seranoa.com>
ppmc8260 MPC8260
Sangmoon Kim <dogoil@etinsys.com>
debris MPC8245
Nye Liu <nyet@zumanetworks.com>
ZUMA MPC7xx_74xx
Thomas Lange <thomas@corelatus.se>
GTH MPC860
The LEOX team <team@leox.org>
ELPT860 MPC860T
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
Andrea "llandre" Marson <andrea.marson@dave-tech.it>
PPChameleonEVB PPC405EP
Reinhard Meyer <r.meyer@emk-elektronik.de>
TOP860 MPC860T
TOP5200 MPC5200
Scott McNutt <smcnutt@artesyncp.com>
EBONY PPC440GP
Tolunay Orkun <torkun@nextio.com>
csb272 PPC405GP
csb472 PPC405GP
Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Stefan Roese <sr@denx.de>
sycamore PPC4xx
walnut PPC4xx
Frank Panno <fpanno@delphintech.com>
ep8260 MPC8260
Peter Pearse <peter.pearse@arm.com>
Integrator/AP CM 926EJ-S, CM7x0T, CM9x0T
Integrator/CP CM 926EJ-S CM920T, CM940T, CM922T-XA10
Versatile/AB ARM926EJ-S
Versatile/PB ARM926EJ-S
Denis Peter <d.peter@mpl.ch>
MIP405 PPC4xx
PIP405 PPC4xx
Daniel Poirot <dan.poirot@windriver.com>
sbc8240 MPC8240
sbc405 PPC405GP
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
ADCIOP IOP480 (PPC401)
@ -263,10 +157,130 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
VOM405 PPC405EP
WUH405 PPC405EP
Frank Gottschling <fgottschling@eltec.de>
MHPC MPC8xx
BAB7xx MPC740/MPC750
Wolfgang Grandegger <wg@denx.de>
CCM MPC855
PN62 MPC8240
IPHASE4539 MPC8260
SCM MPC8260
Howard Gray <mvsensor@matrix-vision.de>
MVS1 MPC823
Klaus Heydeck <heydeck@kieback-peter.de>
KUP4K MPC855
KUP4X MPC859
Murray Jensen <Murray.Jensen@cmst.csiro.au>
cogent_mpc8xx MPC8xx
cogent_mpc8260 MPC8260
hymod MPC8260
Brad Kemp <Brad.Kemp@seranoa.com>
ppmc8260 MPC8260
Sangmoon Kim <dogoil@etinsys.com>
debris MPC8245
Thomas Lange <thomas@corelatus.se>
GTH MPC860
The LEOX team <team@leox.org>
ELPT860 MPC860T
Nye Liu <nyet@zumanetworks.com>
ZUMA MPC7xx_74xx
Jon Loeliger <jdl@freescale.com>
MPC8540ADS MPC8540
MPC8560ADS MPC8560
MPC8541CDS MPC8541
MPC8555CDS MPC8555
Dan Malek <dan@embeddededge.com>
STxGP3 MPC85xx
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
Andrea "llandre" Marson <andrea.marson@dave-tech.it>
PPChameleonEVB PPC405EP
Reinhard Meyer <r.meyer@emk-elektronik.de>
TOP860 MPC860T
TOP5200 MPC5200
Tolunay Orkun <torkun@nextio.com>
csb272 PPC405GP
csb472 PPC405GP
Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Frank Panno <fpanno@delphintech.com>
ep8260 MPC8260
Peter Pearse <peter.pearse@arm.com>
Integrator/AP CM 926EJ-S, CM7x0T, CM9x0T
Integrator/CP CM 926EJ-S CM920T, CM940T, CM922T-XA10
Versatile/AB ARM926EJ-S
Versatile/PB ARM926EJ-S
Denis Peter <d.peter@mpl.ch>
MIP405 PPC4xx
PIP405 PPC4xx
Daniel Poirot <dan.poirot@windriver.com>
sbc8240 MPC8240
sbc405 PPC405GP
Stefan Roese <sr@denx.de>
bamboo PPC440EP
bunbinga PPC405EP
ebony PPC440GP
ocotea PPC440GX
sycamore PPC405GPr
walnut PPC405GP
yellowstone PPC440GR
yosemite PPC440EP
Yusdi Santoso <yusdi_santoso@adaptec.com>
HIDDEN_DRAGON MPC8241/MPC8245
Travis Sawyer (travis.sawyer@sandburst.com>
XPEDITE1K PPC440GX
OCOTEA PPC440GX
Peter De Schrijver <p2@mind.be>
@ -299,21 +313,6 @@ John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
Jon Loeliger <jdl@freescale.com>
MPC8540ADS MPC8540
MPC8560ADS MPC8560
MPC8541CDS MPC8541
MPC8555CDS MPC8555
Dan Malek <dan@embeddededge.com>
STxGP3 MPC85xx
Yusdi Santoso <yusdi_santoso@adaptec.com>
HIDDEN_DRAGON MPC8241/MPC8245
-------------------------------------------------------------------------
Unknown / orphaned boards:
@ -348,6 +347,10 @@ Unknown / orphaned boards:
# Board CPU #
#########################################################################
Rishi Bhattacharya <rishi@ti.com>
omap5912osk ARM926EJS
George G. Davis <gdavis@mvista.com>
assabet SA1100
@ -366,6 +369,11 @@ Marius Gr
impa7 ARM720T (EP7211)
ep7312 ARM720T (EP7312)
Kshitij Gupta <kshitij@ti.com>
omap1510inn ARM925T
omap1610inn ARM926EJS
Kyle Harris <kharris@nexus-tech.net>
lubbock xscale
@ -377,29 +385,13 @@ Gary Jennejohn <gj@denx.de>
smdk2400 ARM920T
trab ARM920T
Prakash Kumar <prakash@embedx.com>
cerf250 xscale
Kshitij Gupta <kshitij@ti.com>
omap1510inn ARM925T
omap1610inn ARM926EJS
Dave Peverley <dpeverley@mpc-data.co.uk>
omap730p2 ARM926EJS
Nishant Kamat <nskamat@ti.com>
omap1610h2 ARM926EJS
Rishi Bhattacharya <rishi@ti.com>
Prakash Kumar <prakash@embedx.com>
omap5912osk ARM926EJS
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
cerf250 xscale
David Müller <d.mueller@elsoft.ch>
@ -410,6 +402,10 @@ Rolf Offermanns <rof@sysgo.de>
shannon SA1100
Dave Peverley <dpeverley@mpc-data.co.uk>
omap730p2 ARM926EJS
Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
@ -417,7 +413,7 @@ Robert Schwebel <r.schwebel@pengutronix.de>
Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
B2 ARM7TDMI (S3C44B0X)
Greg Ungerer <greg.ungerer@opengear.com>
@ -425,6 +421,10 @@ Greg Ungerer <greg.ungerer@opengear.com>
cm4116 ks8695p
cm4148 ks8695p
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
Alex Züpke <azu@sysgo.de>
lart SA1100

7
Makefile
View File

@ -884,15 +884,14 @@ yellowstone_config: unconfig
#########################################################################
## MPC8220 Systems
#########################################################################
Alaska8220_config: unconfig
Alaska8220_config \
Yukon8220_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8220 alaska
sorcery_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8220 sorcery
Yukon8220_config: unconfig
@./mkconfig $(@:_config=) ppc mpc8220 yukon
#########################################################################
## MPC824x Systems
#########################################################################

3
board/amcc/yellowstone/flash.c
View File

@ -329,7 +329,6 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
volatile FLASH_WORD_SIZE *addr2;
int flag, prot, sect, l_sect;
int i;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
@ -517,7 +516,7 @@ int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
*/
static int write_word(flash_info_t * info, ulong dest, ulong data)
{
volatile vu_long *addr2 = (vu_long *) (info->start[0]);
vu_long *addr2 = (vu_long *) (info->start[0]);
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
ulong start;

4
board/amcc/yellowstone/yellowstone.c
View File

@ -315,10 +315,6 @@ int pci_pre_init(struct pci_controller *hose)
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
u16 cmdstat;
DECLARE_GLOBAL_DATA_PTR;
/*--------------------------------------------------------------------------+
* Set up Direct MMIO registers
*--------------------------------------------------------------------------*/

24
board/mpl/common/usb_uhci.c
View File

@ -1,6 +1,25 @@
/*
* (C) Copyright 2001
* Denis Peter, MPL AG Switzerland
* Part of this code has been derived from linux:
* Universal Host Controller Interface driver for USB (take II).
*
* (c) 1999-2001 Georg Acher, acher@in.tum.de (executive slave) (base guitar)
* Deti Fliegl, deti@fliegl.de (executive slave) (lead voice)
* Thomas Sailer, sailer@ife.ee.ethz.ch (chief consultant) (cheer leader)
* Roman Weissgaerber, weissg@vienna.at (virt root hub) (studio porter)
* (c) 2000 Yggdrasil Computing, Inc. (port of new PCI interface support
* from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
* (C) 2000 David Brownell, david-b@pacbell.net (usb-ohci.c)
*
* HW-initalization based on material of
*
* (C) Copyright 1999 Linus Torvalds
* (C) Copyright 1999 Johannes Erdfelt
* (C) Copyright 1999 Randy Dunlap
* (C) Copyright 1999 Gregory P. Smith
*
*
* Adapted for U-Boot:
* (C) Copyright 2001 Denis Peter, MPL AG Switzerland
*
* See file CREDITS for list of people who contributed to this
* project.
@ -20,7 +39,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* Note: Part of this code has been derived from linux
*
*/

8
common/cmd_flash.c
View File

@ -116,12 +116,13 @@ abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)
static int
addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
{
char len_used = 0; /* indicates if the "start +length" form used */
char *ep;
*addr_first = simple_strtoul(arg1, &ep, 16);
if (ep == arg1 || *ep != '\0')
return -1;
char len_used = 0; /* indicates if the "start +length" form used */
if (arg2 && *arg2 == '+'){
len_used = 1;
++arg2;
@ -132,6 +133,9 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
return -1;
if (len_used){
char found = 0;
ulong bank;
/*
* *addr_last has the length, compute correct *addr_last
* XXX watch out for the integer overflow! Right now it is
@ -146,8 +150,6 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
*/
/* find the end addr of the sector where the *addr_last is */
char found = 0;
ulong bank;
for (bank = 0; bank < CFG_MAX_FLASH_BANKS && !found; ++bank){
int i;
flash_info_t *info = &flash_info[bank];

19
common/cmd_scsi.c
View File

@ -585,4 +585,23 @@ void scsi_setup_inquiry(ccb * pccb)
pccb->msgout[0]=SCSI_IDENTIFY; /* NOT USED */
}
U_BOOT_CMD(
scsi, 5, 1, do_scsi,
"scsi - SCSI sub-system\n",
"reset - reset SCSI controller\n"
"scsi info - show available SCSI devices\n"
"scsi scan - (re-)scan SCSI bus\n"
"scsi device [dev] - show or set current device\n"
"scsi part [dev] - print partition table of one or all SCSI devices\n"
"scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"
" to memory address `addr'\n"
);
U_BOOT_CMD(
scsiboot, 3, 1, do_scsiboot,
"scsiboot- boot from SCSI device\n",
"loadAddr dev:part\n"
);
#endif /* #if (CONFIG_COMMANDS & CFG_CMD_SCSI) */

5
common/environment.c
View File

@ -21,7 +21,12 @@
* MA 02111-1307 USA
*/
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
#endif
#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */
#include <config.h>
#undef __ASSEMBLY__
#include <environment.h>
/*

16
common/usb.c
View File

@ -1,9 +1,19 @@
/*
* (C) Copyright 2001
* Denis Peter, MPL AG Switzerland
*
* Most of this source has been derived from the Linux USB
* project.
* project:
* (C) Copyright Linus Torvalds 1999
* (C) Copyright Johannes Erdfelt 1999-2001
* (C) Copyright Andreas Gal 1999
* (C) Copyright Gregory P. Smith 1999
* (C) Copyright Deti Fliegl 1999 (new USB architecture)
* (C) Copyright Randy Dunlap 2000
* (C) Copyright David Brownell 2000 (kernel hotplug, usb_device_id)
* (C) Copyright Yggdrasil Computing, Inc. 2000
* (usb_device_id matching changes by Adam J. Richter)
*
* Adapted for U-Boot:
* (C) Copyright 2001 Denis Peter, MPL AG Switzerland
*
* See file CREDITS for list of people who contributed to this
* project.

15
common/usb_storage.c
View File

@ -1,12 +1,19 @@
/*
* (C) Copyright 2001
* Denis Peter, MPL AG Switzerland
* Most of this source has been derived from the Linux USB
* project:
* (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net)
* (c) 2000 David L. Brown, Jr. (usb-storage@davidb.org)
* (c) 1999 Michael Gee (michael@linuxspecific.com)
* (c) 2000 Yggdrasil Computing, Inc.
*
*
* Adapted for U-Boot:
* (C) Copyright 2001 Denis Peter, MPL AG Switzerland
*
* For BBB support (C) Copyright 2003
* Gary Jennejohn, DENX Software Engineering <gj@denx.de>
*
* Most of this source has been derived from the Linux USB
* project. BBB support based on /sys/dev/usb/umass.c from
* BBB support based on /sys/dev/usb/umass.c from
* FreeBSD.
*
* See file CREDITS for list of people who contributed to this

7
cpu/mpc8260/ether_fcc.c
View File

@ -628,6 +628,9 @@ swap16 (unsigned short x)
return (((x & 0xff) << 8) | ((x & 0xff00) >> 8));
}
/* broadcast is not an error - we send them like that */
#define BD_ENET_RX_ERRS (BD_ENET_RX_STATS & ~BD_ENET_RX_BC)
void
eth_loopback_test (void)
{
@ -1002,7 +1005,7 @@ eth_loopback_test (void)
ecp->rxeacc._f++;
}
if (sc & BD_ENET_RX_STATS) {
if (sc & BD_ENET_RX_ERRS) {
ulong n;
/*
@ -1033,7 +1036,7 @@ eth_loopback_test (void)
ecp->rxeacc.cl++;
bdp->cbd_sc &= \
~BD_ENET_RX_STATS;
~BD_ENET_RX_ERRS;
}
else {
ushort datlen = bdp->cbd_datlen;

4
cpu/mpc85xx/start.S
View File

@ -209,8 +209,8 @@ _start_e500:
li r1,0x0b00
mtspr IVOR11,r1 /* 11: Interval timer */
li r1,0x0c00
mtspr IVOR12,r1 /* 11: Watchdog timer */
li r10,0x0d00
mtspr IVOR12,r1 /* 12: Watchdog timer */
li r1,0x0d00
mtspr IVOR13,r1 /* 13: Data TLB error */
li r1,0x0e00
mtspr IVOR14,r1 /* 14: Instruction TLB error */

12
drivers/ct69000.c
View File

@ -1,6 +1,8 @@
/*
* (C) Copyright 2002
* Denis Peter, MPL AG Switzerland
/* ported from ctfb.c (linux kernel):
* Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de>
*
* Ported to U-Boot:
* (C) Copyright 2002 Denis Peter, MPL AG Switzerland
*
* See file CREDITS for list of people who contributed to this
* project.
@ -21,10 +23,6 @@
* MA 02111-1307 USA
*/
/*
* ported from ctfb.c (linux kernel) for the U-Boot
*
*/
#include <common.h>

11
include/configs/MIP405.h
View File

@ -366,17 +366,6 @@
************************************************************/
#define CONFIG_ATAPI /* enable ATAPI Support */
/************************************************************
* SCSI support (experimental) only SYM53C8xx supported
************************************************************/
#undef CONFIG_SCSI_SYM53C8XX
#ifdef CONFIG_SCSI_SYM53C8XX
#define CFG_SCSI_MAX_LUN 8 /* number of supported LUNs */
#define CFG_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */
#define CFG_SCSI_MAX_DEVICE CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN /* maximum Target devices */
#define CFG_SCSI_SPIN_UP_TIME 2
#endif /* CONFIG_SCSI_SYM53C8XX */
/************************************************************
* DISK Partition support
************************************************************/

317
include/configs/Yukon8220.h Normal file
View File

@ -0,0 +1,317 @@
/*
* (C) Copyright 2004
* TsiChung Liew, Freescale Software Engineering, Tsi-Chung.Liew@freescale.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_MPC8220 1
#define CONFIG_YUKON8220 1 /* ... on Yukon board */
/* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to
determine the CPU speed. */
#define CFG_MPC8220_CLKIN 30000000/* ... running at 30MHz */
#define CFG_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Serial console configuration
*/
/* Define this for PSC console
#define CONFIG_PSC_CONSOLE 1
*/
#define CONFIG_EXTUART_CONSOLE 1
#ifdef CONFIG_EXTUART_CONSOLE
# define CONFIG_CONS_INDEX 1
# define CFG_NS16550_SERIAL
# define CFG_NS16550
# define CFG_NS16550_REG_SIZE 1
# define CFG_NS16550_COM1 (CFG_CPLD_BASE + 0x1008)
# define CFG_NS16550_CLK 18432000
#endif
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
/*
* Supported commands
*/
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_BOOTD | \
CFG_CMD_CACHE | \
CFG_CMD_DHCP | \
CFG_CMD_DIAG | \
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
CFG_CMD_I2C | \
CFG_CMD_NET | \
CFG_CMD_NFS | \
CFG_CMD_PCI | \
CFG_CMD_PING | \
CFG_CMD_REGINFO | \
CFG_CMD_SDRAM | \
CFG_CMD_SNTP )
#define CONFIG_NET_MULTI
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*
* Autobooting
*/
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTARGS "root=/dev/ram rw"
#define CONFIG_ETHADDR 00:e0:0c:bc:e0:60
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:e0:0c:bc:e0:61
#define CONFIG_IPADDR 192.162.1.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.162.1.1
#define CONFIG_GATEWAYIP 192.162.1.1
#define CONFIG_HOSTNAME yukon
#define CONFIG_OVERWRITE_ETHADDR_ONCE
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1
#define CFG_I2C_MODULE 1
#define CFG_I2C_SPEED 100000 /* 100 kHz */
#define CFG_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CFG_I2C_EEPROM_ADDR 0x52 /* 1011000xb */
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_EEPROM_PAGE_WRITE_BITS 3
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
/*
#define CFG_ENV_IS_IN_EEPROM 1
#define CFG_ENV_OFFSET 0
#define CFG_ENV_SIZE 256
*/
/* If CFG_AMD_BOOT is defined, the the system will boot from AMD.
else undefined it will boot from Intel Strata flash */
#define CFG_AMD_BOOT 1
/*
* Flexbus Chipselect configuration
*/
#if defined (CFG_AMD_BOOT)
#define CFG_CS0_BASE 0xfff0
#define CFG_CS0_MASK 0x00080000 /* 512 KB */
#define CFG_CS0_CTRL 0x003f0d40
#define CFG_CS1_BASE 0xfe00
#define CFG_CS1_MASK 0x01000000 /* 16 MB */
#define CFG_CS1_CTRL 0x003f1540
#else
#define CFG_CS0_BASE 0xff00
#define CFG_CS0_MASK 0x01000000 /* 16 MB */
#define CFG_CS0_CTRL 0x003f1540
#define CFG_CS1_BASE 0xfe08
#define CFG_CS1_MASK 0x00080000 /* 512 KB */
#define CFG_CS1_CTRL 0x003f0d40
#endif
#define CFG_CS2_BASE 0xf100
#define CFG_CS2_MASK 0x00040000
#define CFG_CS2_CTRL 0x003f1140
#define CFG_CS3_BASE 0xf200
#define CFG_CS3_MASK 0x00040000
#define CFG_CS3_CTRL 0x003f1100
#define CFG_FLASH0_BASE (CFG_CS0_BASE << 16)
#define CFG_FLASH1_BASE (CFG_CS1_BASE << 16)
#if defined (CFG_AMD_BOOT)
#define CFG_AMD_BASE CFG_FLASH0_BASE
#define CFG_INTEL_BASE CFG_FLASH1_BASE + 0xf00000
#define CFG_FLASH_BASE CFG_AMD_BASE
#else
#define CFG_INTEL_BASE CFG_FLASH0_BASE + 0xf00000
#define CFG_AMD_BASE CFG_FLASH1_BASE
#define CFG_FLASH_BASE CFG_INTEL_BASE
#endif
#define CFG_CPLD_BASE (CFG_CS2_BASE << 16)
#define CFG_FPGA_BASE (CFG_CS3_BASE << 16)
#define CFG_MAX_FLASH_BANKS 4 /* max num of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
#define PHYS_AMD_SECT_SIZE 0x00010000 /* 64 KB sectors (x2) */
#define PHYS_INTEL_SECT_SIZE 0x00020000 /* 128 KB sectors (x2) */
#define CFG_FLASH_CHECKSUM
/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
#if defined (CFG_AMD_BOOT)
#define CFG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
#define CFG_ENV_SIZE PHYS_AMD_SECT_SIZE
#define CFG_ENV_SECT_SIZE PHYS_AMD_SECT_SIZE
#define CFG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
#define CFG_ENV1_SIZE PHYS_INTEL_SECT_SIZE
#define CFG_ENV1_SECT_SIZE PHYS_INTEL_SECT_SIZE
#else
#define CFG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
#define CFG_ENV_SIZE PHYS_INTEL_SECT_SIZE
#define CFG_ENV_SECT_SIZE PHYS_INTEL_SECT_SIZE
#define CFG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
#define CFG_ENV1_SIZE PHYS_AMD_SECT_SIZE
#define CFG_ENV1_SECT_SIZE PHYS_AMD_SECT_SIZE
#endif
#define CONFIG_ENV_OVERWRITE 1
#if defined CFG_ENV_IS_IN_FLASH
#undef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_EEPROM
#elif defined CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
#undef CFG_ENV_IS_IN_EEPROM
#elif defined CFG_ENV_IS_IN_EEPROM
#undef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
#endif
#ifndef CFG_JFFS2_FIRST_SECTOR
#define CFG_JFFS2_FIRST_SECTOR 0
#endif
#ifndef CFG_JFFS2_FIRST_BANK
#define CFG_JFFS2_FIRST_BANK 0
#endif
#ifndef CFG_JFFS2_NUM_BANKS
#define CFG_JFFS2_NUM_BANKS 1
#endif
#define CFG_JFFS2_LAST_BANK (CFG_JFFS2_FIRST_BANK + CFG_JFFS2_NUM_BANKS - 1)
/*
* Memory map
*/
#define CFG_MBAR 0xF0000000
#define CFG_SDRAM_BASE 0x00000000
#define CFG_DEFAULT_MBAR 0x80000000
#define CFG_SRAM_BASE (CFG_MBAR + 0x20000)
#define CFG_SRAM_SIZE 0x8000
/* Use SRAM until RAM will be available */
#define CFG_INIT_RAM_ADDR (CFG_MBAR + 0x20000)
#define CFG_INIT_RAM_END 0x8000 /* End of used area in DPRAM */
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_BASE TEXT_BASE
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
# define CFG_RAMBOOT 1
#endif
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/* SDRAM configuration */
#define CFG_SDRAM_TOTAL_BANKS 2
#define CFG_SDRAM_SPD_I2C_ADDR 0x51 /* 7bit */
#define CFG_SDRAM_SPD_SIZE 0x40
#define CFG_SDRAM_CAS_LATENCY 4 /* (CL=2)x2 */
/* SDRAM drive strength register */
#define CFG_SDRAM_DRIVE_STRENGTH ((DRIVE_STRENGTH_LOW << SDRAMDS_SBE_SHIFT) | \
(DRIVE_STRENGTH_HIGH << SDRAMDS_SBC_SHIFT) | \
(DRIVE_STRENGTH_LOW << SDRAMDS_SBA_SHIFT) | \
(DRIVE_STRENGTH_OFF << SDRAMDS_SBS_SHIFT) | \
(DRIVE_STRENGTH_LOW << SDRAMDS_SBD_SHIFT))
/*
* Ethernet configuration
*/
#define CONFIG_MPC8220_FEC 1
#define CONFIG_FEC_10MBIT 1 /* Workaround for FEC 100Mbit problem */
#define CONFIG_PHY_ADDR 0x18
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* Various low-level settings
*/
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
#define CFG_HID0_FINAL HID0_ICE
#endif /* __CONFIG_H */

6
include/configs/xaeniax.h
View File

@ -236,7 +236,7 @@
* GP30 == SDATA_OUT is 0
* GP81 == NSSPCLK is 0
*/
#define CFG_GPCR0_VAL 0x40C31868
#define CFG_GPCR0_VAL 0x40C31848
#define CFG_GPCR1_VAL 0x00000000
#define CFG_GPCR2_VAL 0x00020000
@ -455,10 +455,10 @@
* [14:12] 010 - RRR2: CS deselect to CS time: 2*(2*MemClk) = 40 ns
* [11:08] 0010 - RDN2: Address to data valid in bursts: (2+1)*MemClk = 30 ns
* [07:04] 0110 - RDF2: Address for first access: (6+1)*MemClk = 70 ns
* [03] 0 - 32 Bit bus width
* [03] 1 - 16 Bit bus width
* [02:00] 100 - variable latency I/O
*/
#define CFG_MSC1_VAL 0x1224A264
#define CFG_MSC1_VAL 0x1224A26C
/* This is the configuration for nCS4/5 -> LAN
* configuration for nCS5:

2
mkconfig
View File

@ -32,7 +32,7 @@ rm -f asm
ln -s asm-$2 asm
rm -f asm-$2/arch
if [ -z "$6" -o "$6" == "NULL" ] ; then
if [ -z "$6" -o "$6" = "NULL" ] ; then
ln -s arch-$3 asm-$2/arch
else
ln -s arch-$6 asm-$2/arch

10
net/nfs.c
View File

@ -703,13 +703,11 @@ NfsStart (void)
}
if (BootFile[0] == '\0') {
IPaddr_t OurIP = ntohl (NetOurIP);
sprintf (default_filename, "/nfsroot/%02lX%02lX%02lX%02lX.img",
OurIP & 0xFF,
(OurIP >> 8) & 0xFF,
(OurIP >> 16) & 0xFF,
(OurIP >> 24) & 0xFF );
NetOurIP & 0xFF,
(NetOurIP >> 8) & 0xFF,
(NetOurIP >> 16) & 0xFF,
(NetOurIP >> 24) & 0xFF );
strcpy (nfs_path, default_filename);
printf ("*** Warning: no boot file name; using '%s'\n",

10
net/tftp.c
View File

@ -302,13 +302,11 @@ void
TftpStart (void)
{
if (BootFile[0] == '\0') {
IPaddr_t OurIP = ntohl(NetOurIP);
sprintf(default_filename, "%02lX%02lX%02lX%02lX.img",
OurIP & 0xFF,
(OurIP >> 8) & 0xFF,
(OurIP >> 16) & 0xFF,
(OurIP >> 24) & 0xFF );
NetOurIP & 0xFF,
(NetOurIP >> 8) & 0xFF,
(NetOurIP >> 16) & 0xFF,
(NetOurIP >> 24) & 0xFF );
tftp_filename = default_filename;
printf ("*** Warning: no boot file name; using '%s'\n",

37
tools/envcrc.c
View File

@ -25,7 +25,10 @@
#include <stdlib.h>
#include <unistd.h>
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
#endif
#define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */
#include <config.h>
#undef __ASSEMBLY__
@ -73,24 +76,24 @@ extern unsigned char environment;
int main (int argc, char **argv)
{
#ifdef ENV_IS_EMBEDDED
int crc ;
unsigned char *envptr = &environment,
*dataptr = envptr + ENV_HEADER_SIZE;
unsigned int datasize = ENV_SIZE;
int crc;
unsigned char *envptr = &environment,
*dataptr = envptr + ENV_HEADER_SIZE;
unsigned int datasize = ENV_SIZE;
crc = crc32(0, dataptr, datasize) ;
crc = crc32 (0, dataptr, datasize);
/* Check if verbose mode is activated passing a parameter to the program */
if (argc > 1) {
printf("CRC32 from offset %08X to %08X of environment = %08X\n",
(unsigned int)(dataptr - envptr),
(unsigned int)(dataptr - envptr) + datasize,
crc);
} else {
printf("0x%08X\n", crc);
}
/* Check if verbose mode is activated passing a parameter to the program */
if (argc > 1) {
printf ("CRC32 from offset %08X to %08X of environment = %08X\n",
(unsigned int) (dataptr - envptr),
(unsigned int) (dataptr - envptr) + datasize,
crc);
} else {
printf ("0x%08X\n", crc);
}
#else
printf("0\n");
printf ("0\n");
#endif
return EXIT_SUCCESS;
return EXIT_SUCCESS;
}