[PATCH] Fix: Compilerwarnings for SC3 board.
The EBC Configuration Register is now by CFG_EBC_CFG definable Added JFFS2 support for the SC3 board. Signed-off-by: Heiko Schocher <hs@denx.de>
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6d3e010723
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cb4820725e
@ -354,6 +354,8 @@ int board_early_init_f (void)
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initUsbHost (&cpldConfig_1);
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initUsbHost (&cpldConfig_1);
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writeb (cpldConfig_1, CPLD_CONTROL_1);
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writeb (cpldConfig_1, CPLD_CONTROL_1);
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#endif
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#endif
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/* FIXME: for what must we do this */
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*(unsigned long *)0x79000080 = 0x0001;
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return(0);
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return(0);
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}
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}
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@ -380,7 +380,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
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pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
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pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
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}
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}
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#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) || defined (CONFIG_SOLIDCARD3)
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#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) && !(defined (CONFIG_SOLIDCARD3))
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/*
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/*
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*As is these functs get called out of flash Not a horrible
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*As is these functs get called out of flash Not a horrible
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@ -406,7 +406,6 @@ static struct pci_controller hose = {
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config_table: pci_405gp_config_table,
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config_table: pci_405gp_config_table,
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};
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};
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#ifndef CONFIG_SOLIDCARD3
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void pci_init_board(void)
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void pci_init_board(void)
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{
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{
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/*we want the ptrs to RAM not flash (ie don't use init list)*/
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/*we want the ptrs to RAM not flash (ie don't use init list)*/
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@ -414,7 +413,6 @@ void pci_init_board(void)
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hose.config_table = pci_405gp_config_table;
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hose.config_table = pci_405gp_config_table;
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pci_405gp_init(&hose);
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pci_405gp_init(&hose);
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}
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}
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#endif
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#endif
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#endif
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@ -313,9 +313,8 @@ cpu_init_f (void)
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mtebc(pb7cr, CFG_EBC_PB7CR);
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mtebc(pb7cr, CFG_EBC_PB7CR);
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#endif
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#endif
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#if defined (CONFIG_SOLIDCARD3)
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#if defined (CFG_EBC_CFG)
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mtebc(epcr, 0xb84ef000);
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mtebc(epcr, CFG_EBC_CFG);
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*(unsigned long *)0x79000080 = 0x0001;
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#endif
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#endif
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#if defined(CONFIG_WATCHDOG)
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#if defined(CONFIG_WATCHDOG)
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@ -860,7 +860,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
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*/
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*/
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static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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{
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{
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#if defined(__LITTLE_ENDIAN)
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#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
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unsigned short w;
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unsigned short w;
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unsigned int l;
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unsigned int l;
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unsigned long long ll;
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unsigned long long ll;
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@ -880,7 +880,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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#endif
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#endif
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break;
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break;
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case FLASH_CFI_32BIT:
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case FLASH_CFI_32BIT:
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#if defined(__LITTLE_ENDIAN)
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#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
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l = c;
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l = c;
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l <<= 24;
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l <<= 24;
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cword->l = (cword->l >> 8) | l;
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cword->l = (cword->l >> 8) | l;
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@ -889,7 +889,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
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#endif
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#endif
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break;
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break;
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case FLASH_CFI_64BIT:
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case FLASH_CFI_64BIT:
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#if defined(__LITTLE_ENDIAN)
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#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
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ll = c;
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ll = c;
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ll <<= 56;
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ll <<= 56;
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cword->ll = (cword->ll >> 8) | ll;
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cword->ll = (cword->ll >> 8) | ll;
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@ -108,7 +108,8 @@
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"nand_args=setenv bootargs root=/dev/mtdblock4 rw\0" \
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"nand_args=setenv bootargs root=/dev/mtdblock5 rw" \
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"rootfstype=jffs2\0" \
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"addip=setenv bootargs ${bootargs} " \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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":${hostname}:${netdev}:off panic=1\0" \
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@ -164,18 +165,19 @@
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#define CONFIG_COMMANDS \
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#define CONFIG_COMMANDS \
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(CONFIG_CMD_DFL | \
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(CONFIG_CMD_DFL | \
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CFG_CMD_PCI | \
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CFG_CMD_PCI | \
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CFG_CMD_IRQ | \
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CFG_CMD_IRQ | \
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CFG_CMD_NET | \
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CFG_CMD_NET | \
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CFG_CMD_MII | \
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CFG_CMD_MII | \
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CFG_CMD_PING | \
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CFG_CMD_PING | \
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CFG_CMD_NAND | \
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CFG_CMD_NAND | \
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CFG_CMD_I2C | \
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CFG_CMD_JFFS2 | \
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CFG_CMD_IDE | \
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CFG_CMD_I2C | \
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CFG_CMD_DATE | \
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CFG_CMD_IDE | \
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CFG_CMD_DHCP | \
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CFG_CMD_DATE | \
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CFG_CMD_CACHE | \
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CFG_CMD_DHCP | \
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CFG_CMD_ELF )
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CFG_CMD_CACHE | \
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CFG_CMD_ELF )
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#include <cmd_confdefs.h>
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@ -404,6 +406,15 @@ extern unsigned long offsetOfEnvironment;
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#define NAND_MAX_CHIPS 1
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#define NAND_MAX_CHIPS 1
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#define CFG_NAND_BASE 0x77D00000
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#define CFG_NAND_BASE 0x77D00000
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#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
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/* No command line, one static partition Partition 3 contains jffs2 rootfs */
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#undef CONFIG_JFFS2_CMDLINE
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#define CONFIG_JFFS2_DEV "nand0"
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#define CONFIG_JFFS2_PART_SIZE 0x00400000
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#define CONFIG_JFFS2_PART_OFFSET 0x00c00000
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* Cache Configuration
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* Cache Configuration
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*
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*
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@ -516,6 +527,8 @@ extern unsigned long offsetOfEnvironment;
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#undef CFG_EBC_PB7AP
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#undef CFG_EBC_PB7AP
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#undef CFG_EBC_PB7CR
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#undef CFG_EBC_PB7CR
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#define CFG_EBC_CFG 0xb84ef000
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#define CONFIG_SDRAM_BANK0 /* use the standard SDRAM initialization */
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#define CONFIG_SDRAM_BANK0 /* use the standard SDRAM initialization */
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#undef CONFIG_SPD_EEPROM
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#undef CONFIG_SPD_EEPROM
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