[PATCH] Fix: Compilerwarnings for SC3 board.

The EBC Configuration Register is now by CFG_EBC_CFG definable
             Added JFFS2 support for the SC3 board.

Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher 2007-01-18 11:28:51 +01:00
parent 6d3e010723
commit cb4820725e
5 changed files with 34 additions and 22 deletions

View File

@ -354,6 +354,8 @@ int board_early_init_f (void)
initUsbHost (&cpldConfig_1); initUsbHost (&cpldConfig_1);
writeb (cpldConfig_1, CPLD_CONTROL_1); writeb (cpldConfig_1, CPLD_CONTROL_1);
#endif #endif
/* FIXME: for what must we do this */
*(unsigned long *)0x79000080 = 0x0001;
return(0); return(0);
} }

View File

@ -380,7 +380,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
} }
#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) || defined (CONFIG_SOLIDCARD3) #if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) && !(defined (CONFIG_SOLIDCARD3))
/* /*
*As is these functs get called out of flash Not a horrible *As is these functs get called out of flash Not a horrible
@ -406,7 +406,6 @@ static struct pci_controller hose = {
config_table: pci_405gp_config_table, config_table: pci_405gp_config_table,
}; };
#ifndef CONFIG_SOLIDCARD3
void pci_init_board(void) void pci_init_board(void)
{ {
/*we want the ptrs to RAM not flash (ie don't use init list)*/ /*we want the ptrs to RAM not flash (ie don't use init list)*/
@ -414,7 +413,6 @@ void pci_init_board(void)
hose.config_table = pci_405gp_config_table; hose.config_table = pci_405gp_config_table;
pci_405gp_init(&hose); pci_405gp_init(&hose);
} }
#endif
#endif #endif

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@ -313,9 +313,8 @@ cpu_init_f (void)
mtebc(pb7cr, CFG_EBC_PB7CR); mtebc(pb7cr, CFG_EBC_PB7CR);
#endif #endif
#if defined (CONFIG_SOLIDCARD3) #if defined (CFG_EBC_CFG)
mtebc(epcr, 0xb84ef000); mtebc(epcr, CFG_EBC_CFG);
*(unsigned long *)0x79000080 = 0x0001;
#endif #endif
#if defined(CONFIG_WATCHDOG) #if defined(CONFIG_WATCHDOG)

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@ -860,7 +860,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
*/ */
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
{ {
#if defined(__LITTLE_ENDIAN) #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
unsigned short w; unsigned short w;
unsigned int l; unsigned int l;
unsigned long long ll; unsigned long long ll;
@ -880,7 +880,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
#endif #endif
break; break;
case FLASH_CFI_32BIT: case FLASH_CFI_32BIT:
#if defined(__LITTLE_ENDIAN) #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
l = c; l = c;
l <<= 24; l <<= 24;
cword->l = (cword->l >> 8) | l; cword->l = (cword->l >> 8) | l;
@ -889,7 +889,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
#endif #endif
break; break;
case FLASH_CFI_64BIT: case FLASH_CFI_64BIT:
#if defined(__LITTLE_ENDIAN) #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
ll = c; ll = c;
ll <<= 56; ll <<= 56;
cword->ll = (cword->ll >> 8) | ll; cword->ll = (cword->ll >> 8) | ll;

View File

@ -108,7 +108,8 @@
"nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \ "nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \
"nand_args=setenv bootargs root=/dev/mtdblock4 rw\0" \ "nand_args=setenv bootargs root=/dev/mtdblock5 rw" \
"rootfstype=jffs2\0" \
"addip=setenv bootargs ${bootargs} " \ "addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \ ":${hostname}:${netdev}:off panic=1\0" \
@ -164,18 +165,19 @@
#define CONFIG_COMMANDS \ #define CONFIG_COMMANDS \
(CONFIG_CMD_DFL | \ (CONFIG_CMD_DFL | \
CFG_CMD_PCI | \ CFG_CMD_PCI | \
CFG_CMD_IRQ | \ CFG_CMD_IRQ | \
CFG_CMD_NET | \ CFG_CMD_NET | \
CFG_CMD_MII | \ CFG_CMD_MII | \
CFG_CMD_PING | \ CFG_CMD_PING | \
CFG_CMD_NAND | \ CFG_CMD_NAND | \
CFG_CMD_I2C | \ CFG_CMD_JFFS2 | \
CFG_CMD_IDE | \ CFG_CMD_I2C | \
CFG_CMD_DATE | \ CFG_CMD_IDE | \
CFG_CMD_DHCP | \ CFG_CMD_DATE | \
CFG_CMD_CACHE | \ CFG_CMD_DHCP | \
CFG_CMD_ELF ) CFG_CMD_CACHE | \
CFG_CMD_ELF )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h> #include <cmd_confdefs.h>
@ -404,6 +406,15 @@ extern unsigned long offsetOfEnvironment;
#define NAND_MAX_CHIPS 1 #define NAND_MAX_CHIPS 1
#define CFG_NAND_BASE 0x77D00000 #define CFG_NAND_BASE 0x77D00000
#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
/* No command line, one static partition Partition 3 contains jffs2 rootfs */
#undef CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV "nand0"
#define CONFIG_JFFS2_PART_SIZE 0x00400000
#define CONFIG_JFFS2_PART_OFFSET 0x00c00000
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* Cache Configuration * Cache Configuration
* *
@ -516,6 +527,8 @@ extern unsigned long offsetOfEnvironment;
#undef CFG_EBC_PB7AP #undef CFG_EBC_PB7AP
#undef CFG_EBC_PB7CR #undef CFG_EBC_PB7CR
#define CFG_EBC_CFG 0xb84ef000
#define CONFIG_SDRAM_BANK0 /* use the standard SDRAM initialization */ #define CONFIG_SDRAM_BANK0 /* use the standard SDRAM initialization */
#undef CONFIG_SPD_EEPROM #undef CONFIG_SPD_EEPROM