board/liteboard: Add support for liteBoard
liteBoard is a development board which uses liteSOM as its base. Hardware specification: * liteSOM (i.MX6UL, DRAM, eMMC) * Ethernet PHY (id 0) * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This commit is contained in:
Marcin Niestroj
Stefano Babic
parent
727feafebb
commit
c9e40e65e1
@ -186,6 +186,10 @@ config TARGET_PICO_IMX6UL
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bool "PICO-IMX6UL-EMMC"
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select MX6UL
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config TARGET_LITEBOARD
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bool "Grinn liteBoard (i.MX6UL)"
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select LITESOM
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config TARGET_PLATINUM_PICON
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bool "platinum-picon"
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select SUPPORT_SPL
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@ -279,6 +283,7 @@ source "board/freescale/mx6sxsabresd/Kconfig"
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source "board/freescale/mx6sxsabreauto/Kconfig"
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source "board/freescale/mx6ul_14x14_evk/Kconfig"
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source "board/freescale/mx6ullevk/Kconfig"
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source "board/grinn/liteboard/Kconfig"
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source "board/phytec/pcm058/Kconfig"
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source "board/gateworks/gw_ventana/Kconfig"
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source "board/kosagi/novena/Kconfig"
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12
board/grinn/liteboard/Kconfig
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12
board/grinn/liteboard/Kconfig
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@ -0,0 +1,12 @@
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if TARGET_LITEBOARD
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config SYS_BOARD
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default "liteboard"
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config SYS_VENDOR
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default "grinn"
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config SYS_CONFIG_NAME
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default "liteboard"
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endif
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6
board/grinn/liteboard/MAINTAINERS
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6
board/grinn/liteboard/MAINTAINERS
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@ -0,0 +1,6 @@
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LITEBOARD
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M: Marcin Niestroj <m.niestroj@grinn-global.com>
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S: Maintained
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F: board/grinn/liteboard/
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F: include/configs/liteboard.h
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F: configs/liteboard_defconfig
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6
board/grinn/liteboard/Makefile
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6
board/grinn/liteboard/Makefile
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@ -0,0 +1,6 @@
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# (C) Copyright 2016 Grinn
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := board.o
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31
board/grinn/liteboard/README
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31
board/grinn/liteboard/README
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@ -0,0 +1,31 @@
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How to use U-Boot on Grinn's liteBoard
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--------------------------------------
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- Build U-Boot for liteBoard:
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$ make mrproper
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$ make liteboard_defconfig
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$ make
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This will generate the SPL image called SPL and the u-boot.img.
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- Flash the SPL image into the micro SD card:
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sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
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- Flash the u-boot.img image into the micro SD card:
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sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
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- Jumper settings:
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S1: 0 1 0 1 1 1
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where 0 means bottom position and 1 means top position (from the
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switch label numbers reference).
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- Insert the micro SD card in the board.
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- Connect USB cable between liteBoard and the PC for the power and console.
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- U-Boot messages should come up.
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287
board/grinn/liteboard/board.c
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287
board/grinn/liteboard/board.c
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@ -0,0 +1,287 @@
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/*
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* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
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* Copyright (C) 2016 Grinn
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/mx6ul_pins.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/boot_mode.h>
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#include <asm/io.h>
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#include <common.h>
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#include <fsl_esdhc.h>
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#include <linux/sizes.h>
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#include <linux/fb.h>
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#include <mach/litesom.h>
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#include <miiphy.h>
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#include <mmc.h>
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#include <netdev.h>
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#include <spl.h>
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#include <usb.h>
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#include <usb/ehci-ci.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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PAD_CTL_SPEED_HIGH | \
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PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
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#define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST | PAD_CTL_ODE)
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#define ENET_CLK_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static iomux_v3_cfg_t const sd_pads[] = {
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MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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/* CD */
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MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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#ifdef CONFIG_FEC_MXC
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static iomux_v3_cfg_t const fec1_pads[] = {
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MX6_PAD_GPIO1_IO06__ENET1_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL),
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MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_TX_EN__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
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MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
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MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
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};
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static void setup_iomux_fec(void)
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{
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imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
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}
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#endif
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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#ifdef CONFIG_FSL_ESDHC
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static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4};
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#define SD_CD_GPIO IMX_GPIO_NR(1, 19)
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static int mmc_get_env_devno(void)
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{
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u32 soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
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int dev_no;
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u32 bootsel;
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bootsel = (soc_sbmr & 0x000000FF) >> 6;
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/* If not boot from sd/mmc, use default value */
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if (bootsel != 1)
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return CONFIG_SYS_MMC_ENV_DEV;
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/* BOOT_CFG2[3] and BOOT_CFG2[4] */
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dev_no = (soc_sbmr & 0x00001800) >> 11;
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return dev_no;
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}
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret = 0;
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switch (cfg->esdhc_base) {
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case USDHC1_BASE_ADDR:
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ret = !gpio_get_value(SD_CD_GPIO);
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break;
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case USDHC2_BASE_ADDR:
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ret = 1;
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break;
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}
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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/* SD */
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imx_iomux_v3_setup_multiple_pads(sd_pads, ARRAY_SIZE(sd_pads));
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gpio_direction_input(SD_CD_GPIO);
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sd_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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ret = fsl_esdhc_initialize(bis, &sd_cfg);
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if (ret) {
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printf("Warning: failed to initialize mmc dev 0 (SD)\n");
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return ret;
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}
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return litesom_mmc_init(bis);
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}
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static int check_mmc_autodetect(void)
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{
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char *autodetect_str = getenv("mmcautodetect");
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if ((autodetect_str != NULL) &&
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(strcmp(autodetect_str, "yes") == 0)) {
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return 1;
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}
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return 0;
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}
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void board_late_mmc_init(void)
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{
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char cmd[32];
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char mmcblk[32];
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u32 dev_no = mmc_get_env_devno();
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if (!check_mmc_autodetect())
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return;
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setenv_ulong("mmcdev", dev_no);
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/* Set mmcblk env */
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sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw",
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dev_no);
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setenv("mmcroot", mmcblk);
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sprintf(cmd, "mmc dev %d", dev_no);
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run_command(cmd, 0);
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}
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#endif
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#ifdef CONFIG_FEC_MXC
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int board_eth_init(bd_t *bis)
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{
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setup_iomux_fec();
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return fecmxc_initialize(bis);
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}
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static int setup_fec(void)
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{
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struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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int ret;
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/* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13],
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set gpr1[17]*/
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clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
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IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
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ret = enable_fec_anatop_clock(0, ENET_50MHZ);
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if (ret)
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return ret;
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enable_enet_clk(1);
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return 0;
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}
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#endif
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#ifdef CONFIG_USB_EHCI_MX6
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int board_usb_phy_mode(int port)
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{
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return USB_INIT_HOST;
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}
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#endif
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_FEC_MXC
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setup_fec();
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#endif
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return 0;
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}
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#ifdef CONFIG_CMD_BMODE
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static const struct boot_mode board_boot_modes[] = {
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/* 4 bit bus width */
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{"sd", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
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{"emmc", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00)},
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{NULL, 0},
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};
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#endif
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int board_late_init(void)
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{
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#ifdef CONFIG_CMD_BMODE
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add_board_boot_modes(board_boot_modes);
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#endif
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#ifdef CONFIG_ENV_IS_IN_MMC
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board_late_mmc_init();
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#endif
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: Grinn liteBoard\n");
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return 0;
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}
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#ifdef CONFIG_SPL_BUILD
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void board_boot_order(u32 *spl_boot_list)
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{
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
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unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
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unsigned port = (reg >> 11) & 0x1;
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if (port == 0) {
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spl_boot_list[0] = BOOT_DEVICE_MMC1;
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spl_boot_list[1] = BOOT_DEVICE_MMC2;
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} else {
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spl_boot_list[0] = BOOT_DEVICE_MMC2;
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spl_boot_list[1] = BOOT_DEVICE_MMC1;
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}
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}
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void board_init_f(ulong dummy)
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{
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litesom_init_f();
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}
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#endif
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29
configs/liteboard_defconfig
Normal file
29
configs/liteboard_defconfig
Normal file
@ -0,0 +1,29 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MX6=y
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_TARGET_LITEBOARD=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_WATCHDOG_SUPPORT=y
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
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CONFIG_BOOTDELAY=1
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CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb"
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CONFIG_SPL=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_LIBFDT=y
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171
include/configs/liteboard.h
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171
include/configs/liteboard.h
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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* Copyright (C) 2016 Grinn
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*
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* Configuration settings for the Grinn liteBoard (i.MX6UL).
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __LITEBOARD_CONFIG_H
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#define __LITEBOARD_CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#include "mx6_common.h"
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/* SPL options */
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#include "imx6_spl.h"
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#ifdef CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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#define CONFIG_SUPPORT_EMMC_BOOT
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#endif
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
|
||||
"fdt_high=0xffffffff\0" \
|
||||
"initrd_high=0xffffffff\0" \
|
||||
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
||||
"fdt_addr=0x83000000\0" \
|
||||
"boot_fdt=try\0" \
|
||||
"ip_dyn=yes\0" \
|
||||
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
|
||||
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
|
||||
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
||||
"mmcautodetect=yes\0" \
|
||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=${mmcroot}\0" \
|
||||
"loadbootscript=" \
|
||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source\0" \
|
||||
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
|
||||
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if run loadfdt; then " \
|
||||
"bootz ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootz; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootz; " \
|
||||
"fi;\0" \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs " \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"netboot=echo Booting from net ...; " \
|
||||
"run netargs; " \
|
||||
"if test ${ip_dyn} = yes; then " \
|
||||
"setenv get_cmd dhcp; " \
|
||||
"else " \
|
||||
"setenv get_cmd tftp; " \
|
||||
"fi; " \
|
||||
"${get_cmd} ${image}; " \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||
"bootz ${loadaddr} - ${fdt_addr}; " \
|
||||
"else " \
|
||||
"if test ${boot_fdt} = try; then " \
|
||||
"bootz; " \
|
||||
"else " \
|
||||
"echo WARN: Cannot load the DT; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else " \
|
||||
"bootz; " \
|
||||
"fi;\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev};" \
|
||||
"if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loadimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run netboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run netboot; fi"
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_MEMTEST_START 0x80000000
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M)
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_STACKSIZE SZ_128K
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_ENV_SIZE SZ_8K
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_ENV_OFFSET (8 * SZ_64K)
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#define CONFIG_SYS_MMC_ENV_PART 0
|
||||
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
|
||||
|
||||
#define CONFIG_CMD_BMODE
|
||||
|
||||
/* USB Configs */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_EHCI
|
||||
#define CONFIG_USB_EHCI_MX6
|
||||
#define CONFIG_USB_STORAGE
|
||||
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
|
||||
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#define CONFIG_MXC_USB_FLAGS 0
|
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
#define CONFIG_FEC_MXC
|
||||
#define CONFIG_MII
|
||||
#define CONFIG_FEC_ENET_DEV 0
|
||||
|
||||
#define IMX_FEC_BASE ENET_BASE_ADDR
|
||||
#define CONFIG_FEC_MXC_PHYADDR 0x0
|
||||
#define CONFIG_FEC_XCV_TYPE RMII
|
||||
#define CONFIG_ETHPRIME "FEC"
|
||||
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
#endif
|
||||
|
||||
#define CONFIG_IMX_THERMAL
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user