Review cleanups.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This commit is contained in:
parent
cb5965fb95
commit
c934f655f9
@ -1,5 +1,5 @@
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# Copyright 2004 Freescale Semiconductor.
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# Modified by Jeff Brown (jeffrey@freescale.com)
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# Modified by Jeff Brown
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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@ -1,6 +1,6 @@
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/*
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* Copyright 2004 Freescale Semiconductor.
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* Jeff Brown (jeffrey@freescale.com)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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@ -59,7 +59,6 @@
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#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
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#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff)
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/*#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) */
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#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)))
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/*
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@ -72,7 +71,6 @@
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#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
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#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff)
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/*#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) */
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#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)))
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#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff)
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@ -86,7 +84,7 @@
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#define LAWAR8 ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
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#endif
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.section .bootpg, "ax"
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.section .bootpg, "ax"
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.globl law_entry
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law_entry:
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lis r7,CFG_CCSRBAR@h
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@ -110,8 +108,8 @@ law_entry:
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stwu r6, 0x20(r4)
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lis r6,LAWAR2@h
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ori r6,r6,LAWAR2@l
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stwu r6, 0x20(r5)
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ori r6,r6,LAWAR2@l
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stwu r6, 0x20(r5)
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/* LAWBAR3, LAWAR3 */
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lis r6,LAWBAR3@h
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@ -127,7 +125,7 @@ law_entry:
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ori r6,r6,LAWBAR4@l
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stwu r6, 0x20(r4)
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lis r6,LAWAR4@h
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lis r6,LAWAR4@h
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ori r6,r6,LAWAR4@l
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stwu r6, 0x20(r5)
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/* LAWBAR5, LAWAR5 */
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@ -157,14 +155,14 @@ law_entry:
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ori r6,r6,LAWAR7@l
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stwu r6, 0x20(r5)
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/* LAWBAR8, LAWAR8 */
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lis r6,LAWBAR8@h
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ori r6,r6,LAWBAR8@l
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stwu r6, 0x20(r4)
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/* LAWBAR8, LAWAR8 */
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lis r6,LAWBAR8@h
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ori r6,r6,LAWBAR8@l
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stwu r6, 0x20(r4)
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lis r6,LAWAR8@h
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ori r6,r6,LAWAR8@l
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stwu r6, 0x20(r5)
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lis r6,LAWAR8@h
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ori r6,r6,LAWAR8@l
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stwu r6, 0x20(r5)
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blr
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@ -1,6 +1,6 @@
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/*
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* Copyright 2004 Freescale Semiconductor.
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* Jeff Brown (jeffrey@freescale.com)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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@ -352,7 +352,7 @@ mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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goto my_usage;
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}
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my_usage:
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my_usage:
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puts("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
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puts(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
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puts(" reset altbank [wd]\n");
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@ -1,7 +1,7 @@
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/*
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* (C) Copyright 2004, Freescale, Inc.
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* (C) Copyright 2002,2003, Motorola,Inc.
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* Jeff Brown (jeffrey@freescale.com)
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* Jeff Brown
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@ -3,7 +3,7 @@
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# Xianghua Xiao,X.Xiao@motorola.com
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#
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# (C) Copyright 2004 Freescale Semiconductor. (MC86xx Port)
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# Jeff Brown (Jeffrey@freescale.com)
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# Jeff Brown
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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@ -30,7 +30,7 @@ LIB = lib$(CPU).a
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START = start.o #resetvec.o
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ASOBJS = cache.o
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COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
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pci.o i2c.o spd_sdram.o
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pci.o i2c.o spd_sdram.o
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OBJS = $(COBJS)
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all: .depend $(START) $(ASOBJS) $(LIB)
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@ -1,6 +1,6 @@
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#
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# (C) Copyright 2004 Freescale Semiconductor.
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# Jeff Brown <jeffrey@freescale.com>
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# Jeff Brown
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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@ -23,4 +23,4 @@
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PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
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PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx -ffixed-r2 -ffixed-r29 -mstring
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PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx -ffixed-r2 -ffixed-r29 -mstring
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@ -1,6 +1,6 @@
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/*
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* Copyright 2004 Freescale Semiconductor.
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* Jeff Brown (jeffrey@freescale.com)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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@ -106,15 +106,6 @@ void cpu_init_f(void)
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/* enable SYNCBE | ABE bits in HID1 */
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set_hid1(get_hid1() | 0x00000C00);
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/* Since the bats have been set up at this point and
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* the local bus registers have been initialized, we
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* turn on the WDEN bit in PIXIS_VCTL
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*/
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/* val = in8(PIXIS_BASE+PIXIS_VCTL); */
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/* Set the WDEN */
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/* val |= 0x08; */
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/* out8(PIXIS_BASE+PIXIS_VCTL,val); */
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}
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/*
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@ -7,7 +7,7 @@
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* Gleb Natapov <gnatapov@mrv.com>
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* Some bits are taken from linux driver writen by adrian@humboldt.co.uk
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*
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* Modified for MPC86xx by Jeff Brown (jeffrey@freescale.com)
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* Modified for MPC86xx by Jeff Brown
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*
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* Hardware I2C driver for MPC107 PCI bridge.
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*
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@ -207,7 +207,7 @@ i2c_read (u8 dev, uint addr, int alen, u8 *data, int length)
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i = __i2c_read(data, length);
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exit:
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exit:
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writeb(MPC86xx_I2CCR_MEN, I2CCCR);
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return !(i == length);
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@ -230,7 +230,7 @@ i2c_write (u8 dev, uint addr, int alen, u8 *data, int length)
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i = __i2c_write(data, length);
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exit:
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exit:
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writeb(MPC86xx_I2CCR_MEN, I2CCCR);
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return !(i == length);
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@ -9,7 +9,7 @@
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* Xianghua Xiao (X.Xiao@motorola.com)
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*
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* (C) Copyright 2004 Freescale Semiconductor. (MPC86xx Port)
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* Jeff Brown (Jeffrey@freescale.com)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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@ -37,11 +37,10 @@
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#include <asm/processor.h>
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#include <ppc_asm.tmpl>
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unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
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unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
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unsigned long timestamp;
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static __inline__ unsigned long get_msr (void)
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{
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unsigned long msr;
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@ -75,7 +74,7 @@ static __inline__ void set_dec (unsigned long val)
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/* interrupt is not supported yet */
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int interrupt_init_cpu (unsigned *decrementer_count)
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{
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return 0;
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return 0;
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}
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@ -89,14 +88,14 @@ int interrupt_init (void)
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if (ret)
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return ret;
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decrementer_count = get_tbclk()/CFG_HZ;
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debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count);
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decrementer_count = get_tbclk()/CFG_HZ;
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debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count);
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set_dec (decrementer_count);
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set_dec (decrementer_count);
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set_msr (get_msr () | MSR_EE);
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debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec());
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debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec());
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return 0;
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}
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@ -119,7 +118,7 @@ int disable_interrupts (void)
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void increment_timestamp(void)
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{
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timestamp++;
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timestamp++;
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}
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/*
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@ -136,15 +135,15 @@ timer_interrupt_cpu (struct pt_regs *regs)
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void timer_interrupt (struct pt_regs *regs)
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{
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/* call cpu specific function from $(CPU)/interrupts.c */
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timer_interrupt_cpu (regs);
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/* call cpu specific function from $(CPU)/interrupts.c */
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timer_interrupt_cpu (regs);
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timestamp++;
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timestamp++;
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ppcDcbf(×tamp);
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ppcDcbf(×tamp);
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/* Restore Decrementer Count */
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set_dec (decrementer_count);
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/* Restore Decrementer Count */
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set_dec (decrementer_count);
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#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
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if ((timestamp % (CFG_WATCHDOG_FREQ)) == 0)
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@ -164,17 +163,17 @@ void timer_interrupt (struct pt_regs *regs)
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void reset_timer (void)
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{
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timestamp = 0;
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timestamp = 0;
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}
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ulong get_timer (ulong base)
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{
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return timestamp - base;
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return timestamp - base;
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}
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void set_timer (ulong t)
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{
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timestamp = t;
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timestamp = t;
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}
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/*
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@ -192,11 +191,8 @@ irq_free_handler(int vec)
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}
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/*******************************************************************************
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*
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/*
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* irqinfo - print information about PCI devices,not implemented.
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*
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*/
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int
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do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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@ -1,6 +1,6 @@
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/*
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* Copyright 2004 Freescale Semiconductor.
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* Jeff Brown (jeffrey@freescale.com)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* (C) Copyright 2000-2002
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@ -29,9 +29,6 @@
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#include <mpc86xx.h>
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#include <asm/processor.h>
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unsigned long get_board_sys_clk(ulong dummy);
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unsigned long get_sysclk_from_px_regs(void);
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void get_sys_info (sys_info_t *sysInfo)
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{
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@ -39,11 +36,11 @@ void get_sys_info (sys_info_t *sysInfo)
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volatile ccsr_gur_t *gur = &immap->im_gur;
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uint plat_ratio, e600_ratio;
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio >>= 1;
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switch(plat_ratio) {
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case 0x0:
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case 0x0:
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sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
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break;
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case 0x02:
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@ -55,19 +52,14 @@ void get_sys_info (sys_info_t *sysInfo)
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case 0x09:
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case 0x0a:
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case 0x0c:
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case 0x10:
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sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
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break;
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case 0x10:
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sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
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break;
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default:
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sysInfo->freqSystemBus = 0;
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break;
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}
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#if 0
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printf("assigned system bus freq = %d for plat ratio 0x%08lx\n",
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sysInfo->freqSystemBus, plat_ratio);
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#endif
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e600_ratio = (gur->porpllsr) & 0x003f0000;
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e600_ratio >>= 16;
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@ -75,13 +67,13 @@ void get_sys_info (sys_info_t *sysInfo)
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case 0x10:
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sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
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break;
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case 0x19:
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case 0x19:
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sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus/2;
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break;
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case 0x20:
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sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
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break;
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case 0x39:
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case 0x39:
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sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus/2;
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break;
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case 0x28:
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@ -90,16 +82,10 @@ void get_sys_info (sys_info_t *sysInfo)
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case 0x1d:
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sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus/2;
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break;
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default:
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/* JB - Emulator workaround until real cop is plugged in */
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/* sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus; */
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default:
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sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
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break;
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}
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#if 0
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printf("assigned processor freq = %d for e600 ratio 0x%08lx\n",
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sysInfo->freqProcessor, e600_ratio);
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#endif
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}
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@ -128,6 +114,7 @@ int get_clocks(void)
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* get_bus_freq
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* Return system bus freq in Hz
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*/
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ulong get_bus_freq(ulong dummy)
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{
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ulong val;
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@ -139,42 +126,6 @@ ulong get_bus_freq(ulong dummy)
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return val;
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}
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unsigned long get_sysclk_from_px_regs()
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{
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ulong val;
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u8 vclkh, vclkl;
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vclkh = in8(PIXIS_BASE + PIXIS_VCLKH);
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vclkl = in8(PIXIS_BASE + PIXIS_VCLKL);
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if ((vclkh == 0x84) && (vclkl == 0x07)) {
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val = 33000000;
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}
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if ((vclkh == 0x3F) && (vclkl == 0x20)) {
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val = 40000000;
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}
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if ((vclkh == 0x3F) && (vclkl == 0x2A)) {
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val = 50000000;
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}
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if ((vclkh == 0x24) && (vclkl == 0x04)) {
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val = 66000000;
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}
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if ((vclkh == 0x3F) && (vclkl == 0x4B)) {
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val = 83000000;
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}
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if ((vclkh == 0x3F) && (vclkl == 0x5C)) {
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val = 100000000;
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}
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if ((vclkh == 0xDF) && (vclkl == 0x3B)) {
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val = 134000000;
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}
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if ((vclkh == 0xDF) && (vclkl == 0x4B)) {
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val = 166000000;
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}
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return val;
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}
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/*
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* get_board_sys_clk
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