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WS cleanup: remove excessive empty lines

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Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2021-09-27 17:42:37 +02:00 committed by Tom Rini
parent 66356b4c06
commit c72231d272
27 changed files with 0 additions and 64 deletions
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1
README
View File

@ -300,7 +300,6 @@ board_init_r():
- loads U-Boot or (in falcon mode) Linux
Configuration Options:
----------------------

2
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
View File

@ -14,8 +14,6 @@
#include "sys_env_lib.h"
#include "ctrl_pex.h"
/*
* serdes_seq_db - holds all serdes sequences, their size and the
* relevant index in the data array initialized in serdes_seq_init

2
arch/xtensa/include/asm/arch-dc232b/core.h
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@ -127,8 +127,6 @@
#define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/

4
arch/xtensa/include/asm/arch-dc232b/tie-asm.h
View File

@ -26,7 +26,6 @@
#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */
/* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
* Save area ptr (clobbered): ptr (1 byte aligned)
@ -109,11 +108,8 @@
.endif
.endm // xchal_ncp_load
#define XCHAL_NCP_NUM_ATMPS 2
#define XCHAL_SA_NUM_ATMPS 2
#endif /*_XTENSA_CORE_TIE_ASM_H*/

3
arch/xtensa/include/asm/arch-dc233c/core.h
View File

@ -149,13 +149,10 @@
#define XCHAL_HAVE_PREFETCH 0 /* PREFCTL register */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------

4
arch/xtensa/include/asm/arch-dc233c/tie-asm.h
View File

@ -31,8 +31,6 @@
| ((ccuse) & XTHAL_SAS_ANYCC) \
| ((abi) & XTHAL_SAS_ANYABI) )
/*
* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
@ -164,8 +162,6 @@
#define XCHAL_NCP_NUM_ATMPS 1
#define XCHAL_SA_NUM_ATMPS 1
#endif /*_XTENSA_CORE_TIE_ASM_H*/

3
arch/xtensa/include/asm/arch-de212/core.h
View File

@ -206,13 +206,10 @@
#define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------

2
arch/xtensa/include/asm/cacheasm.h
View File

@ -134,7 +134,6 @@
.endm
.macro ___flush_invalidate_dcache_range ar as at
#if XCHAL_DCACHE_SIZE
@ -171,7 +170,6 @@
.endm
.macro ___flush_invalidate_dcache_page ar as
#if XCHAL_DCACHE_SIZE

2
board/freescale/ls1088a/ddr.c
View File

@ -88,8 +88,6 @@ found:
pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
pbsp->wrlvl_ctl_3);
popts->half_strength_driver_enable = 0;
/*
* Write leveling override

1
board/freescale/t208xqds/README
View File

@ -158,7 +158,6 @@ Start Address End Address Definition Max size
0xE8000000 0xE801FFFF RCW (current bank) 128KB
Software configurations and board settings
------------------------------------------
1. NOR boot:

4
board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
View File

@ -12399,8 +12399,6 @@ unsigned long ps7_post_config_1_0[] = {
//
};
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@ -12477,8 +12475,6 @@ ps7_init()
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;

4
board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
View File

@ -12732,8 +12732,6 @@ unsigned long ps7_post_config_1_0[] = {
//
};
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@ -12810,8 +12808,6 @@ ps7_init()
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;

4
board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
View File

@ -12639,8 +12639,6 @@ unsigned long ps7_post_config_1_0[] = {
//
};
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@ -12717,8 +12715,6 @@ ps7_init()
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;

4
board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
View File

@ -12297,8 +12297,6 @@ unsigned long ps7_post_config_1_0[] = {
//
};
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
@ -12375,8 +12373,6 @@ ps7_init()
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;

4
cmd/bedbug.c
View File

@ -39,7 +39,6 @@ int bedbug_puts (const char *str)
} /* bedbug_puts */
/* ======================================================================
* Initialize the bug_ctx structure used by the bedbug debugger. This is
* specific to the CPU since each has different debug registers and
@ -53,7 +52,6 @@ int bedbug_init(void)
} /* bedbug_init */
/* ======================================================================
* Entry point from the interpreter to the disassembler. Repeated calls
* will resume from the last disassembled address.
@ -183,7 +181,6 @@ void do_bedbug_breakpoint (struct pt_regs *regs)
} /* do_bedbug_breakpoint */
/* ======================================================================
* Called from the CPU-specific breakpoint handling routine. Enter a
* mini main loop until the stopped flag is cleared from the breakpoint
@ -241,7 +238,6 @@ void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)
} /* bedbug_main_loop */
/* ======================================================================
* Interpreter command to continue from a breakpoint. Just clears the
* stopped flag in the context so that the breakpoint routine will

2
doc/README.dfutftp
View File

@ -88,7 +88,6 @@ for pure DFU USB transfer.
possible to set large enough default buffer (8 MiB @ BBB)
FIT image format for download
-----------------------------
@ -110,7 +109,6 @@ should look like
where "u-boot.bin" is the DFU entity name to be stored.
To do
-----

1
doc/device-tree-bindings/firmware/linaro,optee-tz.txt
View File

@ -21,7 +21,6 @@ the reference implementation maintained by Linaro.
in drivers/tee/optee/optee_smc.h
Example:
firmware {
optee {

2
drivers/gpio/hi6220_gpio.c
View File

@ -54,8 +54,6 @@ static int hi6220_gpio_get_value(struct udevice *dev, unsigned gpio)
return !!readb(bank->base + (BIT(gpio + 2)));
}
static const struct dm_gpio_ops gpio_hi6220_ops = {
.direction_input = hi6220_gpio_direction_input,
.direction_output = hi6220_gpio_direction_output,

2
drivers/i2c/mxc_i2c.c
View File

@ -772,8 +772,6 @@ void bus_i2c_init(int index, int speed, int unused,
bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed);
}
/*
* Init I2C Bus
*/

2
drivers/mtd/nand/raw/nand_util.c
View File

@ -545,8 +545,6 @@ int nand_verify(struct mtd_info *mtd, loff_t ofs, size_t len, u_char *buf)
return rval ? -EIO : 0;
}
/**
* nand_write_skip_bad:
*

4
drivers/net/e1000.c
View File

@ -5251,11 +5251,7 @@ e1000_configure_tx(struct e1000_hw *hw)
mdelay(20);
}
E1000_WRITE_REG(hw, TCTL, tctl);
}
/**

1
drivers/video/stb_truetype.h
View File

@ -497,7 +497,6 @@ STBTT_DEF void stbtt_GetBakedQuad(stbtt_bakedchar *chardata, int pw, int ph, //
// It's inefficient; you might want to c&p it and optimize it.
//////////////////////////////////////////////////////////////////////////////
//
// NEW TEXTURE BAKING API

1
fs/btrfs/kernel-shared/btrfs_tree.h
View File

@ -334,7 +334,6 @@
#define BTRFS_STRING_ITEM_KEY 253
/* 32 bytes in various csum fields */
#define BTRFS_CSUM_SIZE 32

1
include/configs/etamin.h
View File

@ -106,7 +106,6 @@
#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE)
#undef COMMON_ENV_DFU_ARGS
#define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs};" \

2
include/fsl-mc/fsl_dpni.h
View File

@ -173,8 +173,6 @@ do { \
MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\
} while (0)
/* cmd, param, offset, width, type, arg_name */
#define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
do { \

1
include/linux/mtd/flashchip.h
View File

@ -52,7 +52,6 @@ typedef enum {
} flstate_t;
/* NOTE: confusingly, this can be used to refer to more than one chip at a time,
if they're interleaved. This can even refer to individual partitions on
the same physical chip when present. */

1
include/linux/serial_reg.h
View File

@ -288,7 +288,6 @@
#define UART_ACR_ASREN 0x80 /* Additional status enable */
/*
* These definitions are for the RSA-DV II/S card, from
*