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stm32mp1: activate NAND and NOR support on EV1

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Add the necessary configuration to have NAND and NOR support on ev1 board
for BASIC boot (with SPL) or for TRUSTED boot (with TF-A).

STM32MP> nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00184200
  bbt options 0x00060000

STM32MP> sf probe
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, total 64 MiB

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Patrick Delaunay 2019-04-08 15:30:52 +02:00 committed by Patrice Chotard
parent bc9487d4ab
commit c4a739ad50
6 changed files with 112 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
arch/arm/dts/stm32mp157-pinctrl.dtsi
View File

@ -210,6 +210,50 @@
};
};
fmc_pins_a: fmc-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
<STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
<STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
<STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
bias-pull-up;
};
};
fmc_sleep_pins_a: fmc-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
<STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
<STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
<STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
<STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */

16
arch/arm/dts/stm32mp157c-ev1.dts
View File

@ -92,6 +92,22 @@
};
};
&fmc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&fmc_pins_a>;
pinctrl-1 = <&fmc_sleep_pins_a>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
nand: nand@0 {
reg = <0>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <1>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;

15
arch/arm/dts/stm32mp157c.dtsi
View File

@ -1033,6 +1033,21 @@
dma-requests = <48>;
};
fmc: nand-controller@58002000 {
compatible = "st,stm32mp15-fmc2";
reg = <0x58002000 0x1000>,
<0x80000000 0x1000>,
<0x88010000 0x1000>,
<0x88020000 0x1000>,
<0x81000000 0x1000>,
<0x89010000 0x1000>,
<0x89020000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
status = "disabled";
};
qspi: spi@58003000 {
compatible = "st,stm32f469-qspi";
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;

17
configs/stm32mp15_basic_defconfig
View File

@ -29,6 +29,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
@ -37,6 +38,7 @@ CONFIG_CMD_TIMER=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_STM32_ADC=y
@ -55,6 +57,18 @@ CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY=y
CONFIG_PHY_STM32_USBPHYC=y
CONFIG_PINCONF=y
@ -69,6 +83,9 @@ CONFIG_DM_REGULATOR_STM32_VREFBUF=y
CONFIG_DM_REGULATOR_STPMIC1=y
CONFIG_SERIAL_RX_BUFFER=y
CONFIG_STM32_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y

17
configs/stm32mp15_trusted_defconfig
View File

@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
@ -30,6 +31,7 @@ CONFIG_CMD_TIMER=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_STM32_ADC=y
CONFIG_USB_FUNCTION_FASTBOOT=y
@ -47,6 +49,18 @@ CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY=y
CONFIG_PHY_STM32_USBPHYC=y
CONFIG_PINCONF=y
@ -59,6 +73,9 @@ CONFIG_DM_REGULATOR_STM32_VREFBUF=y
CONFIG_DM_REGULATOR_STPMIC1=y
CONFIG_SERIAL_RX_BUFFER=y
CONFIG_STM32_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y

3
include/configs/stm32mp1.h
View File

@ -74,6 +74,9 @@
#if !defined(CONFIG_SPL_BUILD)
/* NAND support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \