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sh3/sh4: rename config option TMU_CLK_DIVIDER to CONFIG_SYS_TMU_CLK_DIV

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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2009-06-04 12:06:48 +02:00 committed by Nobuhiro Iwamatsu
parent 8dd29c87ba
commit be45c63256
11 changed files with 12 additions and 12 deletions
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2
include/configs/MigoR.h
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@ -141,7 +141,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#endif /* __MIGO_R_H */ #endif /* __MIGO_R_H */

2
include/configs/ap325rxa.h
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@ -170,7 +170,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#endif /* __AP325RXA_H */ #endif /* __AP325RXA_H */

2
include/configs/mpr2.h
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@ -82,7 +82,7 @@
/* Clocks */ /* Clocks */
#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_CLK_FREQ 24000000
#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
/* UART */ /* UART */

2
include/configs/ms7720se.h
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@ -101,7 +101,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
/* PCMCIA */ /* PCMCIA */

2
include/configs/ms7722se.h
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@ -128,7 +128,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#endif /* __MS7722SE_H */ #endif /* __MS7722SE_H */

2
include/configs/ms7750se.h
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@ -101,7 +101,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER 4 #define CONFIG_SYS_TMU_CLK_DIV 4
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#endif /* __MS7750SE_H */ #endif /* __MS7750SE_H */

2
include/configs/r2dplus.h
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@ -80,7 +80,7 @@
* SuperH Clock setting * SuperH Clock setting
*/ */
#define CONFIG_SYS_CLK_FREQ 60000000 #define CONFIG_SYS_CLK_FREQ 60000000
#define TMU_CLK_DIVIDER 4 #define CONFIG_SYS_TMU_CLK_DIV 4
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */

2
include/configs/r7780mp.h
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@ -121,7 +121,7 @@
/* Board Clock */ /* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333 #define CONFIG_SYS_CLK_FREQ 33333333
#define TMU_CLK_DIVIDER 4 #define CONFIG_SYS_TMU_CLK_DIV 4
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
/* PCI Controller */ /* PCI Controller */

2
include/configs/sh7763rdp.h
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@ -114,7 +114,7 @@
/* Clock */ /* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666 #define CONFIG_SYS_CLK_FREQ 66666666
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
/* Ether */ /* Ether */

2
include/configs/sh7785lcr.h
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@ -186,7 +186,7 @@
/* Board Clock */ /* Board Clock */
/* The SCIF used external clock. system clock only used timer. */ /* The SCIF used external clock. system clock only used timer. */
#define CONFIG_SYS_CLK_FREQ 50000000 #define CONFIG_SYS_CLK_FREQ 50000000
#define TMU_CLK_DIVIDER 4 #define CONFIG_SYS_TMU_CLK_DIV 4
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#endif /* __SH7785LCR_H */ #endif /* __SH7785LCR_H */

4
lib_sh/time.c
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@ -69,10 +69,10 @@ static void tmu_timer_stop (unsigned int timer)
int timer_init (void) int timer_init (void)
{ {
/* Divide clock by TMU_CLK_DIVIDER */ /* Divide clock by CONFIG_SYS_TMU_CLK_DIV */
u16 bit = 0; u16 bit = 0;
switch (TMU_CLK_DIVIDER) { switch (CONFIG_SYS_TMU_CLK_DIV) {
case 1024: case 1024:
bit = 4; bit = 4;
break; break;