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arm: timer: sunxi: add Allwinner timer erratum workaround

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The Allwinner A64 SoCs suffers from an arch timer implementation erratum,
where sometimes the lower 11 bits of the counter value erroneously
become all 0's or all 1's [1]. This leads to sudden jumps, both forwards and
backwards, with the latter one often showing weird behaviour.
Port the workaround proposed for Linux to U-Boot and activate it for all
A64 boards.
This fixes crashes when accessing MMC devices (SD cards), caused by a
recent change to actually use the counter value for timeout checks.

Fixes: 5ff8e54888 ("sunxi: improve throughput
in the sunxi_mmc driver")

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/576886.html

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
This commit is contained in:
Andre Przywara 2018-06-27 01:42:53 +01:00 committed by Jagan Teki
parent 38651588d3
commit be0d217952
2 changed files with 28 additions and 0 deletions
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24
arch/arm/cpu/armv8/generic_timer.c
View File

@ -46,6 +46,30 @@ unsigned long timer_read_counter(void)
return cntpct;
}
#elif CONFIG_SUNXI_A64_TIMER_ERRATUM
/*
* This erratum sometimes flips the lower 11 bits of the counter value
* to all 0's or all 1's, leading to jumps forwards or backwards.
* Backwards jumps might be interpreted all roll-overs and be treated as
* huge jumps forward.
* The workaround is to check whether the lower 11 bits of the counter are
* all 0 or all 1, then discard this value and read again.
* This occasionally discards valid values, but will catch all erroneous
* reads and fixes the problem reliably. Also this mostly requires only a
* single read, so does not have any significant overhead.
* The algorithm was conceived by Samuel Holland.
*/
unsigned long timer_read_counter(void)
{
unsigned long cntpct;
isb();
do {
asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
} while (((cntpct + 1) & GENMASK(10, 0)) <= 1);
return cntpct;
}
#else
/*
* timer_read_counter() using the Arm Generic Timer (aka arch timer).

4
arch/arm/mach-sunxi/Kconfig
View File

@ -84,6 +84,9 @@ config SUNXI_HIGH_SRAM
Chips using the latter setup are supposed to select this option to
adjust the addresses accordingly.
config SUNXI_A64_TIMER_ERRATUM
bool
# Note only one of these may be selected at a time! But hidden choices are
# not supported by Kconfig
config SUNXI_GEN_SUN4I
@ -270,6 +273,7 @@ config MACH_SUN50I
select SUNXI_DRAM_DW_32BIT
select FIT
select SPL_LOAD_FIT
select SUNXI_A64_TIMER_ERRATUM
config MACH_SUN50I_H5
bool "sun50i (Allwinner H5)"