Update ep8260: Fix flash timeouts; improve clock resolution for faster UARTs
Patch by Jeff Angielski, 21 Feb 2005
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@ -2,6 +2,9 @@
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Changes for U-Boot 1.1.4:
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Changes for U-Boot 1.1.4:
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======================================================================
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======================================================================
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* Update ep8260: Fix flash timeouts; improve clock resolution for faster UARTs
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Patch by Jeff Angielski, 21 Feb 2005
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* Fix au1x00_serial baud rate calculation:
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* Fix au1x00_serial baud rate calculation:
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remove hardcoded cpu clock divisor and use register instead;
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remove hardcoded cpu clock divisor and use register instead;
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round up instead of truncate
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round up instead of truncate
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@ -466,8 +466,13 @@
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
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#endif
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#endif
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#ifdef CFG_EP8260_H2
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#define CFG_FLASH_ERASE_TOUT 240000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#else
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#define CFG_FLASH_ERASE_TOUT 8000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_ERASE_TOUT 8000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */
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#define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */
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#endif
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#ifndef CFG_RAMBOOT
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#ifndef CFG_RAMBOOT
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# define CFG_ENV_IS_IN_FLASH 1
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# define CFG_ENV_IS_IN_FLASH 1
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@ -607,7 +612,11 @@
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* SCCR - System Clock Control 9-8
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* SCCR - System Clock Control 9-8
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*-----------------------------------------------------------------------
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*-----------------------------------------------------------------------
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*/
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*/
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#ifdef CFG_EP8260_H2
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#define CFG_SCCR (SCCR_DFBRG00)
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#else
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#define CFG_SCCR (SCCR_DFBRG01)
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#define CFG_SCCR (SCCR_DFBRG01)
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#endif
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* RCCR - RISC Controller Configuration 13-7
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* RCCR - RISC Controller Configuration 13-7
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