rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF
On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL enabled: this allows the use of syscon to retrieve the addresses of GRF and SGRF (except for the early debug UART setup, which runs so early that the device-model is not initialised). This removes the hard-coded addresses and goes through syscon to retrieve the base-addresses of GRF and SGRF. After that, we use the structure definitions to locate the respective registers. In addition to this, the inclusion of header files is also cleaned up: - all headers are included at the beginning (there was a spurious inclusion of the grf header from within a function) - all #include statements for unused headers are removed - the remaining #include statements are sorted (while keeping common.h included in front) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -5,19 +5,17 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <ram.h>
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#include <spl.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3399.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/sdram.h>
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#include <asm/io.h>
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#include <asm/arch/timer.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <dm/pinctrl.h>
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#include <power/regulator.h>
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#include <ram.h>
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#include <spl.h>
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#include <syscon.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -53,7 +51,6 @@ void secure_timer_init(void)
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void board_debug_uart_init(void)
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void board_debug_uart_init(void)
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{
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{
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#include <asm/arch/grf_rk3399.h>
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#define GRF_BASE 0xff770000
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#define GRF_BASE 0xff770000
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struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
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struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
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@ -80,13 +77,12 @@ void board_debug_uart_init(void)
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#endif
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#endif
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}
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}
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#define GRF_EMMCCORE_CON11 0xff77f02c
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#define SGRF_DDR_RGN_CON16 0xff330040
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#define SGRF_SLV_SECURE_CON4 0xff33e3d0
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void board_init_f(ulong dummy)
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void board_init_f(ulong dummy)
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{
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{
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struct udevice *pinctrl;
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struct udevice *pinctrl;
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struct udevice *dev;
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struct udevice *dev;
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struct rk3399_pmusgrf_regs *sgrf;
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struct rk3399_grf_regs *grf;
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int ret;
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int ret;
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#define EARLY_UART
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#define EARLY_UART
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@ -103,9 +99,6 @@ void board_init_f(ulong dummy)
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printascii("U-Boot SPL board init");
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printascii("U-Boot SPL board init");
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#endif
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#endif
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/* Emmc clock generator: disable the clock multipilier */
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rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
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ret = spl_early_init();
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ret = spl_early_init();
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if (ret) {
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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debug("spl_early_init() failed: %d\n", ret);
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@ -121,8 +114,13 @@ void board_init_f(ulong dummy)
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* driver, which tries to DMA from/to the stack (likely)
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* driver, which tries to DMA from/to the stack (likely)
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* located in this range.
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* located in this range.
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*/
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*/
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rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
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sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
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rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
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rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
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rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
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/* eMMC clock generator: disable the clock multipilier */
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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rk_clrreg(&grf->emmccore_con[11], 0x0ff);
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secure_timer_init();
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secure_timer_init();
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