omap3: incorrect logical check in do_emif4_init
((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x01) is always false. This does not match the comment /*Wait till that bit clears*/ The problem was indicated by cppcheck. I do not have the hardware to test if the code change below leads to a correct system behavior. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -76,7 +76,7 @@ static void do_emif4_init(void)
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regval |= (1<<10);
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writel(regval, &emif4_base->sdram_iodft_tlgc);
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/*Wait till that bit clears*/
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while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1);
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while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0);
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/*Re-verify the DDR PHY status*/
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while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0);
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