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mx7ulp_evk: Update LPDDR3 script

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Update LPDDR3 script with the changes below:
  -Update the precharge command to CMD=01 at the DDR initialization phase
  -remove unimplemented registers
   Write data bit delay --refer to the DDR_TRIM bits in
   IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn

Test:
  One EVK board passes overnight stress test.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li 2019-05-15 09:56:53 +00:00 committed by Stefano Babic
parent 72a9414bd4
commit b4bd5d71ae
2 changed files with 4 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
board/freescale/mx7ulp_evk/imximage.cfg
View File

@ -88,11 +88,6 @@ DATA 4 0x40AB0820 0x33333333
DATA 4 0x40AB0824 0x33333333
DATA 4 0x40AB0828 0x33333333
DATA 4 0x40AB082C 0xf3333333
DATA 4 0x40AB0830 0xf3333333
DATA 4 0x40AB0834 0xf3333333
DATA 4 0x40AB0838 0xf3333333
DATA 4 0x40AB08C0 0x24922492
DATA 4 0x40AB08B8 0x00000800
@ -107,8 +102,8 @@ DATA 4 0x40AB0030 0x009F0E10
DATA 4 0x40AB0040 0x0000003F
DATA 4 0x40AB0000 0xC3190000
DATA 4 0x40AB001C 0x00008050
DATA 4 0x40AB001C 0x00008058
DATA 4 0x40AB001C 0x00008010
DATA 4 0x40AB001C 0x00008018
DATA 4 0x40AB001C 0x003F8030
DATA 4 0x40AB001C 0x003F8038
DATA 4 0x40AB001C 0xFF0A8030

13
board/freescale/mx7ulp_evk/plugin.S
View File

@ -115,15 +115,6 @@ wait2:
ldr r1, =0x33333333
str r1, [r0, #0x828]
ldr r1, =0xf3333333
str r1, [r0, #0x82c]
ldr r1, =0xf3333333
str r1, [r0, #0x830]
ldr r1, =0xf3333333
str r1, [r0, #0x834]
ldr r1, =0xf3333333
str r1, [r0, #0x838]
ldr r1, =0x24922492
str r1, [r0, #0x8c0]
ldr r1, =0x00000800
@ -151,9 +142,9 @@ wait2:
ldr r1, =0xC3190000
str r1, [r0, #0x0]
ldr r1, =0x00008050
ldr r1, =0x00008010
str r1, [r0, #0x1c]
ldr r1, =0x00008058
ldr r1, =0x00008018
str r1, [r0, #0x1c]
ldr r1, =0x003F8030
str r1, [r0, #0x1c]