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Merge with /home/m8/git/u-boot

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This commit is contained in:
Wolfgang Denk 2006-04-12 12:26:32 +02:00
commit b28a31ca02
41 changed files with 178 additions and 128 deletions
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6
CHANGELOG
View File

@ -2,6 +2,12 @@
Changes since U-Boot 1.1.4:
======================================================================
* Fix JFFS2 support for legacy NAND driver.
* Remove dependencies between DoC code and old legacy NAND driver.
* Fix PM828_PCI target, for which PCI was *not* configured in.
* Fix Lite5200B support: initialize SDelay register
See Freescale's AN3221 "MPC5200B SDRAM Initialization and
Configuration", 3.3.1 SDelay--MBAR + 0x0190

4
Makefile
View File

@ -133,6 +133,8 @@ LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
LIBS += dtt/libdtt.a
LIBS += drivers/libdrivers.a
LIBS += drivers/nand/libnand.a
LIBS += drivers/nand_legacy/libnand_legacy.a
LIBS += drivers/sk98lin/libsk98lin.a
LIBS += post/libpost.a post/cpu/libcpu.a
LIBS += common/libcommon.a
@ -1187,7 +1189,7 @@ PM828_config \
PM828_PCI_config \
PM828_ROMBOOT_config \
PM828_ROMBOOT_PCI_config: unconfig
@if [ -z "$(findstring _PCI_,$@)" ] ; then \
@if [ "$(findstring _PCI_,$@)" ] ; then \
echo "#define CONFIG_PCI" >>include/config.h ; \
echo "... with PCI enabled" ; \
else \

3
board/amcc/bamboo/config.mk
View File

@ -32,6 +32,3 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
endif
# legacy nand support
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

6
board/dave/PPChameleonEVB/config.mk
View File

@ -26,9 +26,3 @@
# Reserve 320 kB for Monitor
TEXT_BASE = 0xFFFB0000
# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined)
BOARDLIBS = drivers/nand/libnand.a
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

7
board/delta/config.mk
View File

@ -1,8 +1 @@
#TEXT_BASE = 0x0
#TEXT_BASE = 0xa1700000
#TEXT_BASE = 0xa3080000
#TEXT_BASE = 0x9ffe0000
TEXT_BASE = 0x83008000
# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE)
BOARDLIBS = drivers/nand/libnand.a

2
board/delta/nand.c
View File

@ -23,7 +23,7 @@
#include <common.h>
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#ifdef CONFIG_NEW_NAND_CODE
#if !defined(CFG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/pxa-regs.h>

3
board/esd/ash405/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xFFFC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/cms700/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xFFFC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

16
board/esd/common/auto_update.c
View File

@ -24,8 +24,8 @@
#include <common.h>
#ifndef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
#endif
#include <command.h>
@ -74,7 +74,7 @@ extern int flash_write (char *, ulong, ulong);
/* change char* to void* to shutup the compiler */
extern block_dev_desc_t *get_dev (char*, int);
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
/* references to names in cmd_nand.c */
#define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00
@ -84,7 +84,7 @@ extern struct nand_chip nand_dev_desc[];
extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
size_t * retlen, u_char * buf);
extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */
extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
@ -188,7 +188,7 @@ int au_do_update(int i, long sz)
int off, rc;
uint nbytes;
int k;
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
int total;
#endif
@ -262,7 +262,7 @@ int au_do_update(int i, long sz)
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase(start, end);
} else {
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
printf("Updating NAND FLASH with image %s\n", au_image[i].name);
debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0);
@ -290,7 +290,7 @@ int au_do_update(int i, long sz)
debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
rc = flash_write((char *)addr, start, nbytes);
} else {
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes);
rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
start, nbytes, (size_t *)&total, (uchar *)addr);
@ -308,7 +308,7 @@ int au_do_update(int i, long sz)
if (au_image[i].type != AU_NAND) {
rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size));
} else {
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
start, nbytes, (size_t *)&total, (uchar *)addr);
rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size));

3
board/esd/cpci405/config.mk
View File

@ -38,6 +38,3 @@ TEXT_BASE = 0xFFFD0000
endif
endif
endif
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/hh405/config.mk
View File

@ -29,6 +29,3 @@
TEXT_BASE = 0xFFF80000
#TEXT_BASE = 0xFFFC0000
#TEXT_BASE = 0x00FC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/hub405/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xFFFC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/plu405/config.mk
View File

@ -27,6 +27,3 @@
TEXT_BASE = 0xFFFC0000
#TEXT_BASE = 0x00FC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/voh405/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xFFF80000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/esd/wuh405/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xFFFC0000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/netphone/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0x40000000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/netstar/config.mk
View File

@ -9,6 +9,3 @@
# XXX TEXT_BASE = 0x20012000
TEXT_BASE = 0x13FC0000
# Compile the new NAND code
BOARDLIBS = drivers/nand/libnand.a

4
board/netta/netta.c
View File

@ -555,9 +555,9 @@ int board_early_init_f(void)
return 0;
}
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_legacy.h>
extern ulong nand_probe(ulong physadr);
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];

3
board/netta2/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0x40000000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/netvia/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0x40000000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

3
board/sixnet/config.mk
View File

@ -26,6 +26,3 @@
#
TEXT_BASE = 0xF8000000
# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a

30
common/cmd_doc.c
View File

@ -22,11 +22,7 @@
#if (CONFIG_COMMANDS & CFG_CMD_DOC)
#include <linux/mtd/nftl.h>
#include <linux/mtd/nand_legacy.h>
#include <linux/mtd/nand_ids.h>
#include <linux/mtd/doc2000.h>
#include <linux/mtd/nftl.h>
#ifdef CFG_DOC_SUPPORT_2000
#define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k)
@ -69,6 +65,32 @@ static struct DiskOnChip doc_dev_desc[CFG_MAX_DOC_DEVICE];
/* Current DOC Device */
static int curr_device = -1;
/* Supported NAND flash devices */
static struct nand_flash_dev nand_flash_ids[] = {
{"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
{"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
{"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0},
{"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0},
{"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0},
{"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0},
{"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0},
{"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0},
{"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0},
{"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0},
{"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0},
{"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0},
{"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0},
{"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
{"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0},
{"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0},
{"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0},
{"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
{"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
{"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
{"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
{NULL,}
};
/* ------------------------------------------------------------------------- */
int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

5
drivers/nand/diskonchip.c
View File

@ -21,9 +21,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if !defined(CFG_NAND_LEGACY)
#include <linux/kernel.h>
#include <linux/init.h>
@ -1786,3 +1784,4 @@ module_exit(cleanup_nanddoc);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
#endif

6
drivers/nand/nand.c
View File

@ -23,11 +23,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <nand.h>

6
drivers/nand/nand_base.c
View File

@ -72,11 +72,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <watchdog.h>

6
drivers/nand/nand_bbt.c
View File

@ -54,11 +54,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <linux/mtd/compat.h>

6
drivers/nand/nand_ecc.c
View File

@ -37,11 +37,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include<linux/mtd/mtd.h>
/*

6
drivers/nand/nand_ids.c
View File

@ -13,11 +13,7 @@
#include <common.h>
#ifdef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand.h>

18
drivers/nand_legacy/nand_legacy.c
View File

@ -10,11 +10,6 @@
*/
#include <common.h>
#ifndef CFG_NAND_LEGACY
#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
#endif
#include <command.h>
#include <malloc.h>
#include <asm/io.h>
@ -27,7 +22,7 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#include <linux/mtd/nand_ids.h>
@ -1612,4 +1607,13 @@ static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
#endif
#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
#ifdef CONFIG_JFFS2_NAND
int read_jffs2_nand(size_t start, size_t len,
size_t * retlen, u_char * buf, int nanddev)
{
return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
start, len, retlen, buf);
}
#endif /* CONFIG_JFFS2_NAND */
#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */

38
fs/jffs2/jffs2_1pass.c
View File

@ -144,7 +144,11 @@
static struct part_info *current_part;
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
#if defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#else
#include <nand.h>
#endif
/*
* Support for jffs2 on top of NAND-flash
*
@ -155,8 +159,14 @@ static struct part_info *current_part;
*
*/
#if defined(CFG_NAND_LEGACY)
/* this one defined in nand_legacy.c */
int read_jffs2_nand(size_t start, size_t len,
size_t * retlen, u_char * buf, int nanddev);
#else
/* info for NAND chips, defined in drivers/nand/nand.c */
extern nand_info_t nand_info[];
#endif
#define NAND_PAGE_SIZE 512
#define NAND_PAGE_SHIFT 9
@ -167,7 +177,6 @@ extern nand_info_t nand_info[];
#endif
#define NAND_CACHE_SIZE (NAND_CACHE_PAGES*NAND_PAGE_SIZE)
#ifdef CFG_NAND_LEGACY
static u8* nand_cache = NULL;
static u32 nand_cache_off = (u32)-1;
@ -175,7 +184,11 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
{
struct mtdids *id = current_part->dev->id;
u32 bytes_read = 0;
#if defined(CFG_NAND_LEGACY)
size_t retlen;
#else
ulong retlen;
#endif
int cpy_bytes;
while (bytes_read < size) {
@ -193,14 +206,24 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
}
retlen = NAND_CACHE_SIZE;
if (nand_read(&nand_info[id->num], nand_cache_off,
&retlen, nand_cache) != 0 ||
#if defined(CFG_NAND_LEGACY)
if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
&retlen, nand_cache, id->num) < 0 ||
retlen != NAND_CACHE_SIZE) {
printf("read_nand_cached: error reading nand off %#x size %d bytes\n",
nand_cache_off, NAND_CACHE_SIZE);
return -1;
}
#else
retlen = NAND_CACHE_SIZE;
if (nand_read(&nand_info[id->num], nand_cache_off,
&retlen, nand_cache) != 0 ||
retlen != NAND_CACHE_SIZE) {
printf("read_nand_cached: error reading nand off %#x size %d bytes\n",
nand_cache_off, NAND_CACHE_SIZE);
return -1;
}
#endif
}
cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read);
if (cpy_bytes > size - bytes_read)
@ -251,7 +274,6 @@ static void put_fl_mem_nand(void *buf)
{
free(buf);
}
#endif /* CFG_NAND_LEGACY */
#endif /* #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) */
@ -294,7 +316,7 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf)
return get_fl_mem_nor(off);
#endif
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
if (id->type == MTD_DEV_TYPE_NAND)
return get_fl_mem_nand(off, size, ext_buf);
#endif
@ -312,7 +334,7 @@ static inline void *get_node_mem(u32 off)
return get_node_mem_nor(off);
#endif
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
if (id->type == MTD_DEV_TYPE_NAND)
return get_node_mem_nand(off);
#endif
@ -323,7 +345,7 @@ static inline void *get_node_mem(u32 off)
static inline void put_fl_mem(void *buf)
{
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
struct mtdids *id = current_part->dev->id;
if (id->type == MTD_DEV_TYPE_NAND)

19
include/configs/CATcenter.h
View File

@ -193,6 +193,8 @@
*/
#define CFG_NAND0_BASE 0xFF400000
#define CFG_NAND1_BASE 0xFF000000
#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
#define NAND_BIG_DELAY_US 25
/* For CATcenter there is only NAND on the module */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
@ -218,9 +220,9 @@
#define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */
#define NAND_DISABLE_CE(nand) do \
#define MACRO_NAND_DISABLE_CE(nandptr) do \
{ \
switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \
@ -231,9 +233,9 @@
} \
} while(0)
#define NAND_ENABLE_CE(nand) do \
#define MACRO_NAND_ENABLE_CE(nandptr) do \
{ \
switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \
switch((unsigned long)nandptr) \
{ \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \
@ -244,8 +246,7 @@
} \
} while(0)
#define NAND_CTL_CLRALE(nandptr) do \
#define MACRO_NAND_CTL_CLRALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@ -258,7 +259,7 @@
} \
} while(0)
#define NAND_CTL_SETALE(nandptr) do \
#define MACRO_NAND_CTL_SETALE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@ -271,7 +272,7 @@
} \
} while(0)
#define NAND_CTL_CLRCLE(nandptr) do \
#define MACRO_NAND_CTL_CLRCLE(nandptr) do \
{ \
switch((unsigned long)nandptr) \
{ \
@ -284,7 +285,7 @@
} \
} while(0)
#define NAND_CTL_SETCLE(nandptr) do { \
#define MACRO_NAND_CTL_SETCLE(nandptr) do { \
switch((unsigned long)nandptr) { \
case CFG_NAND0_BASE: \
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \

2
include/configs/CPU86.h
View File

@ -178,8 +178,6 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#define CFG_NAND_LEGACY
/*
* Miscellaneous configurable options
*/

1
include/configs/IDS8247.h
View File

@ -236,6 +236,7 @@
*/
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CFG_NAND0_BASE 0xE1000000
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */

2
include/configs/NC650.h
View File

@ -217,6 +217,8 @@
/*
* NAND flash support
*/
#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1
#define NAND_ChipID_UNKNOWN 0x00
#define SECTORSIZE 512

1
include/configs/NETTA.h
View File

@ -609,6 +609,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_MTD_NAND_UNSAFE

2
include/configs/RBC823.h
View File

@ -326,8 +326,6 @@
/************************************************************
* Disk-On-Chip configuration
************************************************************/
#define CFG_NAND_LEGACY
#define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
#define CFG_DOC_SHORT_TIMEOUT
#define CFG_DOC_SUPPORT_2000

1
include/configs/VCMA9.h
View File

@ -248,6 +248,7 @@
*/
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512

3
include/configs/delta.h
View File

@ -178,7 +178,8 @@
* NAND Flash
*/
/* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */
#define CONFIG_NEW_NAND_CODE
#undef CFG_NAND_LEGACY
#define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
#undef CFG_NAND1_BASE

1
include/configs/omap2420h4.h
View File

@ -132,6 +132,7 @@
/*
* Board NAND Info.
*/
#define CFG_NAND_LEGACY
#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */

1
include/configs/stxxtc.h
View File

@ -436,6 +436,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE

65
include/linux/mtd/doc2000.h
View File

@ -91,6 +91,13 @@ struct DiskOnChip;
#define ADDR_PAGE 2
#define ADDR_COLUMN_PAGE 3
struct Nand {
char floor, chip;
unsigned long curadr;
unsigned char curmode;
/* Also some erase/write/pipeline info when we get that far */
};
struct DiskOnChip {
unsigned long physadr;
unsigned long virtadr;
@ -148,4 +155,62 @@ void doc_probe(unsigned long physadr);
void doc_print(struct DiskOnChip*);
/*
* Standard NAND flash commands
*/
#define NAND_CMD_READ0 0
#define NAND_CMD_READ1 1
#define NAND_CMD_PAGEPROG 0x10
#define NAND_CMD_READOOB 0x50
#define NAND_CMD_ERASE1 0x60
#define NAND_CMD_STATUS 0x70
#define NAND_CMD_SEQIN 0x80
#define NAND_CMD_READID 0x90
#define NAND_CMD_ERASE2 0xd0
#define NAND_CMD_RESET 0xff
/*
* NAND Flash Manufacturer ID Codes
*/
#define NAND_MFR_TOSHIBA 0x98
#define NAND_MFR_SAMSUNG 0xec
/*
* NAND Flash Device ID Structure
*
* Structure overview:
*
* name - Complete name of device
*
* manufacture_id - manufacturer ID code of device.
*
* model_id - model ID code of device.
*
* chipshift - total number of address bits for the device which
* is used to calculate address offsets and the total
* number of bytes the device is capable of.
*
* page256 - denotes if flash device has 256 byte pages or not.
*
* pageadrlen - number of bytes minus one needed to hold the
* complete address into the flash array. Keep in
* mind that when a read or write is done to a
* specific address, the address is input serially
* 8 bits at a time. This structure member is used
* by the read/write routines as a loop index for
* shifting the address out 8 bits at a time.
*
* erasesize - size of an erase block in the flash device.
*/
struct nand_flash_dev {
char * name;
int manufacture_id;
int model_id;
int chipshift;
char page256;
char pageadrlen;
unsigned long erasesize;
int bus16;
};
#endif /* __MTD_DOC2000_H__ */