* Fix IceCube CLKIN configuration (it's 33.000000MHz)
* Add new configuration for IceCube board with DDR memory * Update TRAB memory configurations
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wdenk
parent
5c745d2613
commit
b2001f273f
@ -2,6 +2,12 @@
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Changes since U-Boot 1.0.0:
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======================================================================
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* Fix IceCube CLKIN configuration (it's 33.000000MHz)
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* Add new configuration for IceCube board with DDR memory
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* Update TRAB memory configurations
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* Add JFFS2 support for INCA-IP board
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* Patch by Bill Hargen, 09 Dec 2003:
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18
Makefile
18
Makefile
@ -204,6 +204,8 @@ cmi_mpc5xx_config: unconfig
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MPC5200LITE_config \
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MPC5200LITE_LOWBOOT_config \
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MPC5200LITE_LOWBOOT08_config \
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icecube_5200_DDR_config \
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IceCube_5200_DDR_config \
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icecube_5200_config \
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IceCube_5200_config \
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IceCube_5100_config: unconfig
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@ -220,6 +222,10 @@ IceCube_5100_config: unconfig
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{ echo "#define CONFIG_MPC5200" >>include/config.h ; \
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echo "... with MPC5200 processor" ; \
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}
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@[ -z "$(findstring DDR,$@)" ] || \
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{ echo "#define CONFIG_MPC5200_DDR" >>include/config.h ; \
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echo "... DDR memory revision" ; \
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}
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@[ -z "$(findstring 5100,$@)" ] || \
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{ echo "#define CONFIG_MGT5100" >>include/config.h ; \
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echo "... with MGT5100 processor" ; \
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@ -895,23 +901,27 @@ smdk2400_config : unconfig
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smdk2410_config : unconfig
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@./mkconfig $(@:_config=) arm arm920t smdk2410
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# TRAB default configuration: 8 MB Flash, 32 MB RAM
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trab_config \
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trab_bigram_config \
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trab_bigflash_config \
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trab_old_config: unconfig
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@ >include/config.h
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@[ -z "$(findstring _bigram,$@)" ] || \
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{ echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \
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{ echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \
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echo "#define CONFIG_RAM_32MB" >>include/config.h ; \
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echo "... with 8 MB Flash, 32 MB RAM" ; \
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}
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@[ -z "$(findstring _bigflash,$@)" ] || \
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{ echo "#define CONFIG_RAM_16MB" >>include/config.h ; \
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{ echo "#define CONFIG_FLASH_16MB" >>include/config.h ; \
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echo "#define CONFIG_RAM_16MB" >>include/config.h ; \
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echo "... with 16 MB Flash, 16 MB RAM" ; \
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echo "TEXT_BASE = 0x0CF40000" >board/trab/config.tmp ; \
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}
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@[ -z "$(findstring _old,$@)" ] || \
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{ echo "#define CONFIG_OLD_VERSION" >>include/config.h ; \
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echo "... with small memory configuration" ; \
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{ echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \
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echo "#define CONFIG_RAM_16MB" >>include/config.h ; \
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echo "... with 8 MB Flash, 16 MB RAM" ; \
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echo "TEXT_BASE = 0x0CF40000" >board/trab/config.tmp ; \
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}
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@./mkconfig -a $(call xtract_trab,$@) arm arm920t trab
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@ -68,6 +68,24 @@ static void sdram_start (int hi_addr)
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{
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long hi_addr_bit = hi_addr ? 0x01000000 : 0;
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#ifdef CONFIG_MPC5200_DDR
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/* unlock mode register */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f00 | hi_addr_bit;
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f02 | hi_addr_bit;
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/* set mode register: extended mode */
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*(vu_long *)MPC5XXX_SDRAM_MODE = 0x40090000;
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/* set mode register: reset DLL */
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*(vu_long *)MPC5XXX_SDRAM_MODE = 0x058d0000;
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f02 | hi_addr_bit;
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/* auto refresh */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f04 | hi_addr_bit;
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/* set mode register */
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*(vu_long *)MPC5XXX_SDRAM_MODE = 0x018d0000;
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/* normal operation */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x705f0f00 | hi_addr_bit;
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#else
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/* unlock mode register */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit;
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/* precharge all banks */
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@ -86,12 +104,16 @@ static void sdram_start (int hi_addr)
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*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
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/* normal operation */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit;
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#endif
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}
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#endif
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long int initdram (int board_type)
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{
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ulong dramsize = 0;
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#ifdef CONFIG_MPC5200_DDR
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ulong dramsize2 = 0;
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#endif
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#ifndef CFG_RAMBOOT
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ulong test1, test2;
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@ -100,9 +122,18 @@ long int initdram (int board_type)
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
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#ifdef CONFIG_MPC5200_DDR
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/* setup config registers */
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0x73722930;
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x47770000;
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/* set tap delay to 0x10 */
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*(vu_long *)MPC5XXX_CDM_PORCFG = 0x10000000;
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#else
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/* setup config registers */
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00;
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
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#endif
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#elif defined(CONFIG_MGT5100)
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*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
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@ -129,7 +160,23 @@ long int initdram (int board_type)
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#if defined(CONFIG_MPC5200)
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG =
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(0x13 + __builtin_ffs(dramsize >> 20) - 1);
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#ifdef CONFIG_MPC5200_DDR
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
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sdram_start(0);
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test1 = dram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
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sdram_start(1);
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test2 = dram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000);
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if (test1 > test2) {
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sdram_start(0);
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dramsize2 = test1;
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} else {
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dramsize2 = test2;
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}
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG =
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dramsize + (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
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#else
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
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#endif
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#elif defined(CONFIG_MGT5100)
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*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
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#endif
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@ -140,8 +187,15 @@ long int initdram (int board_type)
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dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
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#else
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dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
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#ifdef CONFIG_MPC5200_DDR
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dramsize2 = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS1CFG - 0x13)) << 20);
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#endif
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#endif
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#endif /* CFG_RAMBOOT */
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#ifdef CONFIG_MPC5200_DDR
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dramsize += dramsize2;
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#endif
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/* return total ram size */
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return dramsize;
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}
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@ -32,7 +32,7 @@
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#define CONFIG_MPC5XXX 1 /* This is an MPC5xxx CPU */
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#define CONFIG_ICECUBE 1 /* ... on IceCube board */
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#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33MHz */
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#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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@ -219,7 +219,11 @@
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/*
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* GPIO configuration
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*/
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#ifdef CONFIG_MPC5200_DDR
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#define CFG_GPS_PORT_CONFIG 0x90000004
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#else
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#define CFG_GPS_PORT_CONFIG 0x10000004
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#endif
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/*
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* Miscellaneous configurable options
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@ -253,12 +257,25 @@
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#define CFG_HID0_FINAL 0
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#endif
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#ifdef CONFIG_MPC5200_DDR
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#define CFG_BOOTCS_START 0xff800000
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#define CFG_BOOTCS_SIZE 0x00800000
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#define CFG_BOOTCS_CFG 0x00047801
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#define CFG_CS1_START 0xff000000
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#define CFG_CS1_SIZE 0x00800000
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#define CFG_CS1_CFG 0x00047800
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#else /* !CONFIG_MPC5200_DDR */
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#define CFG_BOOTCS_START CFG_FLASH_BASE
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#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
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#define CFG_BOOTCS_CFG 0x00047801
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#define CFG_CS0_START CFG_FLASH_BASE
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#define CFG_CS0_SIZE CFG_FLASH_SIZE
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#endif /* CONFIG_MPC5200_DDR */
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#define CFG_CS_BURST 0x00000000
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#define CFG_CS_DEADCYCLE 0x33333333
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@ -26,10 +26,15 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#ifdef CONFIG_OLD_VERSION /* Old configuration: */
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#define CONFIG_RAM_16MB /* 16 MB SDRAM */
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/*
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* Default configuration is with 8 MB Flash, 32 MB RAM
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*/
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#if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
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# define CONFIG_FLASH_8MB /* 8 MB Flash */
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#endif
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#if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
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# define CONFIG_RAM_32MB /* 32 MB SDRAM */
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#endif
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#define CONFIG_FLASH_8MB /* 8 MB Flash */
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/*
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* If we are developing, we might want to start armboot from ram
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