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powerpc: P1025RDB: Separate from P1_P2_RDB_PC in Kconfig

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Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.

Remove macro CONFIG_P1025RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-17 14:10:14 -08:00
parent 4eedabfe93
commit b0c98b4b9f
11 changed files with 23 additions and 20 deletions
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5
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@ -145,6 +145,11 @@ config TARGET_P1024RDB
select SUPPORT_SPL
select SUPPORT_TPL
config TARGET_P1025RDB
bool "Support P1025RDB"
select SUPPORT_SPL
select SUPPORT_TPL
config TARGET_P1_P2_RDB_PC
bool "Support p1_p2_rdb_pc"
select SUPPORT_SPL

3
board/freescale/p1_p2_rdb_pc/Kconfig
View File

@ -4,7 +4,8 @@ if TARGET_P1_P2_RDB_PC || \
TARGET_P1020RDB_PD || \
TARGET_P1020UTM || \
TARGET_P1021RDB || \
TARGET_P1024RDB
TARGET_P1024RDB || \
TARGET_P1025RDB
config SYS_BOARD
default "p1_p2_rdb_pc"

2
board/freescale/p1_p2_rdb_pc/ddr.c
View File

@ -147,7 +147,7 @@ dimm_params_t ddr_raw_timing = {
.tfaw_ps = 37500,
};
#elif defined(CONFIG_TARGET_P1024RDB) || \
defined(CONFIG_P1025RDB)
defined(CONFIG_TARGET_P1025RDB)
/*
* Samsung K4B2G0846C-HCH9
* The following timing are for "downshift"

8
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
View File

@ -47,7 +47,7 @@
#define GPIO_2BIT_MASK (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
#endif
#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
#define PCA_IOPORT_I2C_ADDR 0x23
#define PCA_IOPORT_OUTPUT_CMD 0x2
#define PCA_IOPORT_CFG_CMD 0x6
@ -65,7 +65,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{GPIO_GETH_SW_PORT, GPIO_GETH_SW_PIN, 1, 0, 0}, /* RST_GETH_SW_N */
{GPIO_SLIC_PORT, GPIO_SLIC_PIN, 1, 0, 0}, /* RST_SLIC_N */
#ifdef CONFIG_P1025RDB
#ifdef CONFIG_TARGET_P1025RDB
/* QE_MUX_MDC */
{1, 19, 1, 0, 1}, /* QE_MUX_MDC */
@ -379,7 +379,7 @@ int board_eth_init(bd_t *bis)
}
#if defined(CONFIG_QE) && \
(defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
(defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
static void fdt_board_fixup_qe_pins(void *blob)
{
unsigned int oldbus;
@ -448,7 +448,7 @@ int ft_board_setup(void *blob, bd_t *bd)
#ifdef CONFIG_QE
do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
sizeof("okay"), 0);
#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
fdt_board_fixup_qe_pins(blob);
#endif
#endif

3
configs/P1025RDB_36BIT_defconfig
View File

@ -1,12 +1,11 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1025RDB=y
CONFIG_PHYS_64BIT=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y

4
configs/P1025RDB_NAND_defconfig
View File

@ -2,12 +2,12 @@ CONFIG_PPC=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1025RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_TPL=y

4
configs/P1025RDB_SDCARD_defconfig
View File

@ -6,12 +6,12 @@ CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1025RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

4
configs/P1025RDB_SPIFLASH_defconfig
View File

@ -7,12 +7,12 @@ CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1025RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y

3
configs/P1025RDB_defconfig
View File

@ -1,11 +1,10 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_TARGET_P1025RDB=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y

6
include/configs/p1_p2_rdb_pc.h
View File

@ -131,7 +131,7 @@
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
#if defined(CONFIG_P1025RDB)
#if defined(CONFIG_TARGET_P1025RDB)
#define CONFIG_BOARDNAME "P1025RDB"
#define CONFIG_NAND_FSL_ELBC
#define CONFIG_P1025
@ -755,7 +755,7 @@
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#endif /* CONFIG_QE */
#ifdef CONFIG_P1025RDB
#ifdef CONFIG_TARGET_P1025RDB
/*
* QE UEC ethernet configuration
*/
@ -789,7 +789,7 @@
#define CONFIG_SYS_UEC5_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
#define CONFIG_SYS_UEC5_INTERFACE_SPEED 100
#endif /* CONFIG_UEC_ETH5 */
#endif /* CONFIG_P1025RDB */
#endif /* CONFIG_TARGET_P1025RDB */
/*
* Environment

1
scripts/config_whitelist.txt
View File

@ -3387,7 +3387,6 @@ CONFIG_P1020
CONFIG_P1021
CONFIG_P1024
CONFIG_P1025
CONFIG_P1025RDB
CONFIG_P2020
CONFIG_P2020RDB
CONFIG_P2041RDB