imx: spl: Fix NAND bootmode detection
commit 20f1471416
("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.
Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf,
like it was in the code before.
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
parent
baefb63a13
commit
af104ae5b8
@ -81,7 +81,8 @@ enum imx6_bmode {
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IMX6_BMODE_ESD,
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IMX6_BMODE_MMC,
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IMX6_BMODE_EMMC,
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IMX6_BMODE_NAND,
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IMX6_BMODE_NAND_MIN,
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IMX6_BMODE_NAND_MAX = 0xf,
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};
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static inline u8 imx6_is_bmode_from_gpr9(void)
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@ -91,7 +91,7 @@ u32 spl_boot_device(void)
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case IMX6_BMODE_EMMC:
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return BOOT_DEVICE_MMC1;
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/* NAND Flash: 8.5.2, Table 8-10 */
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case IMX6_BMODE_NAND:
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case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
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return BOOT_DEVICE_NAND;
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}
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return BOOT_DEVICE_NONE;
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@ -69,7 +69,7 @@ int board_late_init(void)
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#endif
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env_set("modeboot", "mmcboot");
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break;
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case IMX6_BMODE_NAND:
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case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
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env_set("modeboot", "nandboot");
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break;
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default:
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