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imx: timer: don't clear the GPT control register multiple times

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There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Anatolij Gustschin 2017-08-28 17:46:32 +02:00 committed by Stefano Babic
parent cb40adff8f
commit ae64226dbe
1 changed files with 1 additions and 2 deletions
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3
arch/arm/mach-imx/timer.c
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@ -74,8 +74,7 @@ int timer_init(void)
__raw_writel(GPTCR_SWR, &cur_gpt->control);
/* We have no udelay by now */
for (i = 0; i < 100; i++)
__raw_writel(0, &cur_gpt->control);
__raw_writel(0, &cur_gpt->control);
i = __raw_readl(&cur_gpt->control);
i &= ~GPTCR_CLKSOURCE_MASK;