leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

x86: tsc: add support for reading CPU freq from cpuid

Browse Source 
Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.

This fixes booting on a skylake based system.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed wrong indention of labels]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Christian Gmeiner 2018-05-14 11:32:17 +02:00 committed by Bin Meng
parent 7868909ed5
commit acc2482fd8
1 changed files with 25 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
drivers/timer/tsc_timer.c
View File

@ -21,6 +21,17 @@
DECLARE_GLOBAL_DATA_PTR;
static unsigned long cpu_mhz_from_cpuid(void)
{
if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
return 0;
if (cpuid_eax(0) < 0x16)
return 0;
return cpuid_eax(0x16);
}
/*
* According to Intel 64 and IA-32 System Programming Guide,
* if MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be
@ -343,13 +354,21 @@ static void tsc_timer_ensure_setup(void)
if (!gd->arch.clock_rate) {
unsigned long fast_calibrate;
fast_calibrate = cpu_mhz_from_msr();
if (!fast_calibrate) {
fast_calibrate = quick_pit_calibrate();
if (!fast_calibrate)
panic("TSC frequency is ZERO");
}
fast_calibrate = cpu_mhz_from_cpuid();
if (fast_calibrate)
goto done;
fast_calibrate = cpu_mhz_from_msr();
if (fast_calibrate)
goto done;
fast_calibrate = quick_pit_calibrate();
if (fast_calibrate)
goto done;
panic("TSC frequency is ZERO");
done:
gd->arch.clock_rate = fast_calibrate * 1000000;
}
}