Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
parent
81e612014c
commit
abbb90666d
@ -132,14 +132,6 @@ Identify:
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---------
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CONFIG_IDENT_STRING added to the U_BOOT_VERSION String
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I2C stuff:
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----------
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CFG_EEPROM_PAGE_WRITE_ENABLE enables page write of the I2C EEPROM
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CFG_EEPROM_PAGE_WRITE_BITS _must_ be
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defined.
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Environment / Console:
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----------------------
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@ -315,7 +315,6 @@ extern int flash_banks;
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* External Bus Controller (EBC) Setup
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@ -256,7 +256,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -194,7 +194,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/* Flash banks JFFS2 should use */
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/*
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@ -419,7 +419,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* Cache Configuration
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@ -268,7 +268,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_WREN 1
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@ -219,7 +219,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_WREN 1
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@ -264,7 +264,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -283,7 +283,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -259,7 +259,6 @@
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/* 32 byte page write mode using*/
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/* last 5 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/* Use EEPROM for environment variables */
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@ -286,7 +286,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -198,7 +198,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
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#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
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@ -239,7 +239,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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@ -225,7 +225,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
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#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
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@ -182,7 +182,6 @@
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR 0x54
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 5
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
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@ -328,7 +328,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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@ -360,7 +360,6 @@
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/* last 5 bits of the address */
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#endif
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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@ -255,7 +255,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -110,7 +110,6 @@
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#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */
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/* 64 byte page write mode using*/
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/* last 6 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE /* enable Page write */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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@ -328,7 +328,6 @@
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 6
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* General PCI
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@ -220,7 +220,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -218,7 +218,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -249,7 +249,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -103,7 +103,6 @@
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#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */
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/* 64 byte page write mode using*/
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/* last 6 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE /* enable Page write */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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@ -295,7 +295,6 @@
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/* 16 byte page write mode using */
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* External Bus Controller (EBC) Setup
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@ -267,7 +267,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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@ -233,7 +233,6 @@
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#define CFG_I2C_EEPROM_ADDR 0x54
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 5
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
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@ -452,7 +452,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -148,7 +148,6 @@
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/* 32 byte page write mode using*/
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/* last 5 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#if defined (CONFIG_SOFT_I2C)
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#if 0 /* push-pull */
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@ -119,7 +119,6 @@
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 4
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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/* I2C RTC */
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@ -213,7 +213,6 @@ extern int tqm834x_num_flash_banks;
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#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */
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#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes per write */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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@ -323,7 +323,6 @@
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#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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@ -292,7 +292,6 @@
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/* 32 byte page write mode using*/
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/* last 5 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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@ -214,7 +214,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* External Bus Controller (EBC) Setup
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@ -279,7 +279,6 @@
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#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
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/* mask of address bits that overflow into the "EEPROM chip address" */
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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@ -284,7 +284,6 @@
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#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */
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#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_I2C_MULTI_EEPROMS
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/*-----------------------------------------------------------------------
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@ -252,7 +252,6 @@
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/* 16 byte page write mode using*/
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/* last 4 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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/*
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* Init Memory Controller:
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@ -156,7 +156,6 @@ extern void out32(unsigned int, unsigned long);
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#define CONFIG_ENV_OFFSET 0x100
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#define CFG_I2C_EEPROM_ADDR 0x50 /* this is actually the second page of the eeprom */
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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@ -203,7 +203,6 @@
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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/* 8 byte page write mode using */
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/* last 3 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* and takes up to 40 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \"run kernelx\" to boot the system;" \
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_EEPROM_ADDR 0x54
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#ifdef CONFIG_ENV_IS_IN_EEPROM
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
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#define CFG_EEPROM_PAGE_WRITE_BITS 4
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#undef CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
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#define CFG_EEPROM_PAGE_WRITE_BITS 4
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#undef CFG_I2C_MULTI_EEPROMS
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/* mask of address bits that overflow into the "EEPROM chip address" */
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
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#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */
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#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* 16 byte write page size */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0x50)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_BITS 3
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
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/* 64 byte page write mode using*/
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/* last 6 bits of the address */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
|
||||
#define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */
|
||||
#define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */
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||||
|
@ -162,7 +162,6 @@
|
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
|
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#define CFG_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#undef CFG_I2C_MULTI_EEPROMS
|
||||
|
||||
|
||||
|
@ -308,7 +308,6 @@
|
||||
* EEPROM configuration
|
||||
*/
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
|
||||
#define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
|
||||
|
@ -241,7 +241,6 @@
|
||||
#define CFG_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
/* I2C SYSMON (LM75, AD7414 is almost compatible) */
|
||||
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
|
||||
|
@ -136,8 +136,6 @@
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
/* for LM81 */
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
|
@ -157,7 +157,6 @@
|
||||
#define CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -112,7 +112,6 @@
|
||||
/* 8 byte page write mode using */
|
||||
/* last 3 bits of the address */
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* and takes up to 40 msec */
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Default configuration (environment varibles...)
|
||||
|
@ -143,7 +143,6 @@
|
||||
|
||||
#define CFG_I2C_EEPROM_ADDR (0xa4>>1)
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -225,7 +225,6 @@
|
||||
#define CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -263,7 +263,6 @@
|
||||
#define CFG_DTT_MAX_TEMP 125
|
||||
#define CFG_DTT_LOW_TEMP -55
|
||||
#define CFG_DTT_HYSTERESIS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 4
|
||||
|
||||
/*
|
||||
|
@ -216,7 +216,6 @@
|
||||
#define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
|
||||
|
||||
/*
|
||||
|
@ -139,7 +139,6 @@
|
||||
#undef CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_EEPROM_ADDR 0x50
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -138,8 +138,6 @@
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
/* for LM81 */
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
|
||||
/*
|
||||
* RTC configuration
|
||||
|
@ -98,7 +98,6 @@
|
||||
#define CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -143,7 +143,6 @@
|
||||
#define CFG_I2C_MULTI_EEPROMS
|
||||
#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
|
||||
|
@ -175,7 +175,6 @@
|
||||
/* mask of address bits that overflow into the "EEPROM chip address" */
|
||||
#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
|
||||
|
||||
#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */
|
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 byte write page size */
|
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user