apalis_imx6: migrate i2c to using driver model
Migrate I2C to using driver model. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Marcel Ziswiler
Stefano Babic
parent
29a0a3debf
commit
ab92352d22
@ -20,13 +20,11 @@
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#include <asm/gpio.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/sata.h>
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#include <asm/mach-imx/video.h>
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#include <dm/platform_data/serial_mxc.h>
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#include <environment.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include <imx_thermal.h>
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#include <micrel.h>
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#include <miiphy.h>
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@ -50,32 +48,16 @@ DECLARE_GLOBAL_DATA_PTR;
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_SRE_SLOW)
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#define NO_PULLUP ( \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_SRE_SLOW)
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#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
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PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
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#define TRISTATE (PAD_CTL_HYS | PAD_CTL_SPEED_MED)
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#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
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#define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST)
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int dram_init(void)
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@ -97,63 +79,6 @@ iomux_v3_cfg_t const uart1_pads_dte[] = {
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MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
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/* Apalis I2C1 */
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struct i2c_pads_info i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
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.gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
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.gp = IMX_GPIO_NR(5, 27)
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},
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.sda = {
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.i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
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.gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
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.gp = IMX_GPIO_NR(5, 26)
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}
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};
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/* Apalis local, PMIC, SGTL5000, STMPE811 */
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struct i2c_pads_info i2c_pad_info_loc = {
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.scl = {
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.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
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.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
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.gp = IMX_GPIO_NR(4, 12)
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},
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.sda = {
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.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
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.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
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.gp = IMX_GPIO_NR(4, 13)
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}
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};
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/* Apalis I2C3 / CAM */
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struct i2c_pads_info i2c_pad_info3 = {
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.scl = {
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.i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
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.gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
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.gp = IMX_GPIO_NR(3, 17)
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},
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.sda = {
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.i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
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.gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
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.gp = IMX_GPIO_NR(3, 18)
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}
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};
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/* Apalis I2C2 / DDC */
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struct i2c_pads_info i2c_pad_info_ddc = {
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.scl = {
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.i2c_mode = MX6_PAD_EIM_EB2__HDMI_TX_DDC_SCL | PC,
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.gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
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.gp = IMX_GPIO_NR(2, 30)
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},
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.sda = {
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.i2c_mode = MX6_PAD_EIM_D16__HDMI_TX_DDC_SDA | PC,
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.gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
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.gp = IMX_GPIO_NR(3, 16)
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}
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};
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/* Apalis MMC1 */
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iomux_v3_cfg_t const usdhc1_pads[] = {
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MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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@ -583,12 +508,6 @@ static void do_enable_hdmi(struct display_info_t const *dev)
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imx_enable_hdmi_phy();
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}
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static int detect_i2c(struct display_info_t const *dev)
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{
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return (0 == i2c_set_bus_num(dev->bus)) &&
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(0 == i2c_probe(dev->addr));
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}
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static void enable_lvds(struct display_info_t const *dev)
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{
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struct iomuxc *iomux = (struct iomuxc *)
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@ -682,7 +601,6 @@ struct display_info_t const displays[] = {{
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.bus = -1,
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.addr = 0,
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.pixfmt = IPU_PIX_FMT_LVDS666,
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.detect = detect_i2c,
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.enable = enable_lvds,
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.mode = {
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.name = "wsvga-lvds",
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@ -797,10 +715,6 @@ int board_init(void)
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc);
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setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
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#if defined(CONFIG_VIDEO_IPUV3)
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setup_display();
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#endif
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@ -1218,7 +1132,7 @@ void board_init_f(ulong dummy)
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ccgr_init();
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gpr_init();
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/* iomux and setup of i2c */
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/* iomux */
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board_early_init_f();
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/* setup GP timer */
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014-2016, Toradex AG
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* Copyright (C) 2014-2019, Toradex AG
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*/
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/*
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@ -9,7 +9,6 @@
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#include <common.h>
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#include <i2c.h>
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#include <linux/compiler.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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@ -30,22 +29,25 @@ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = {
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unsigned pmic_init(void)
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{
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int rc;
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struct udevice *dev = NULL;
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unsigned programmed = 0;
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uchar bus = 1;
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uchar devid, revid, val;
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puts("PMIC: ");
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if (!((0 == i2c_set_bus_num(bus)) &&
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(0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
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puts("i2c bus failed\n");
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rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
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if (rc) {
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printf("failed to get device for PMIC at address 0x%x\n",
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PFUZE100_I2C_ADDR);
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return 0;
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}
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/* get device ident */
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
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if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) {
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puts("i2c pmic devid read failed\n");
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return 0;
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}
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) {
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if (dm_i2c_read(dev, PFUZE100_REVID, &revid, 1) < 0) {
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puts("i2c pmic revid read failed\n");
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return 0;
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}
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@ -60,7 +62,7 @@ unsigned pmic_init(void)
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for (j = 0; j < 0x80; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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dm_i2c_read(dev, j + i, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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@ -68,8 +70,7 @@ unsigned pmic_init(void)
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printf("\nEXT Page 1");
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val = PFUZE100_PAGE_REGISTER_PAGE1;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
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&val, 1)) {
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if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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@ -77,7 +78,7 @@ unsigned pmic_init(void)
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for (j = 0x80; j < 0x100; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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dm_i2c_read(dev, j + i, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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@ -85,8 +86,7 @@ unsigned pmic_init(void)
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printf("\nEXT Page 2");
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val = PFUZE100_PAGE_REGISTER_PAGE2;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
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&val, 1)) {
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if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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@ -94,35 +94,35 @@ unsigned pmic_init(void)
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for (j = 0x80; j < 0x100; ) {
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printf("\n%2x", j);
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for (i = 0; i < 16; i++) {
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i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
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dm_i2c_read(dev, j + i, &val, 1);
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printf("\t%2x", val);
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}
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j += 0x10;
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}
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printf("\n");
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}
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#endif
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#endif /* DEBUG */
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/* get device programmed state */
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val = PFUZE100_PAGE_REGISTER_PAGE1;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) {
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if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
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puts("i2c write failed\n");
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return 0;
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}
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) {
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if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return 0;
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}
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if (val & PFUZE100_FUSE_POR_M)
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programmed++;
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) {
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if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return programmed;
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}
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if (val & PFUZE100_FUSE_POR_M)
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programmed++;
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if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) {
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if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) {
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puts("i2c fuse_por read failed\n");
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return programmed;
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}
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@ -145,18 +145,15 @@ unsigned pmic_init(void)
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if (programmed != 3) {
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/* set VGEN1 to 1.2V */
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val = PFUZE100_VGEN1_VAL;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_VGEN1CTL, 1,
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&val, 1)) {
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if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) {
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puts("i2c write failed\n");
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return programmed;
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}
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/* set SWBST to 5.0V */
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val = PFUZE100_SWBST_VAL;
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if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_SWBSTCTL, 1,
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&val, 1)) {
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if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1))
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puts("i2c write failed\n");
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}
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}
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return programmed;
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}
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@ -164,6 +161,8 @@ unsigned pmic_init(void)
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#ifndef CONFIG_SPL_BUILD
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static int pf0100_prog(void)
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{
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int rc;
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struct udevice *dev = NULL;
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unsigned char bus = 1;
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unsigned char val;
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unsigned int i;
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@ -177,9 +176,10 @@ static int pf0100_prog(void)
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ARRAY_SIZE(pmic_prog_pads));
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gpio_direction_output(PMIC_PROG_VOLTAGE, 0);
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if (!((0 == i2c_set_bus_num(bus)) &&
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(0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
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puts("i2c bus failed\n");
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rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
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if (rc) {
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printf("failed to get device for PMIC at address 0x%x\n",
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PFUZE100_I2C_ADDR);
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return CMD_RET_FAILURE;
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}
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@ -187,8 +187,7 @@ static int pf0100_prog(void)
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switch (pmic_otp_prog[i].cmd) {
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case pmic_i2c:
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val = (unsigned char) (pmic_otp_prog[i].value & 0xff);
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if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg,
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1, &val, 1)) {
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if (dm_i2c_write(dev, pmic_otp_prog[i].reg, &val, 1)) {
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printf("i2c write failed, reg 0x%2x, value 0x%2x\n",
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pmic_otp_prog[i].reg, val);
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return CMD_RET_FAILURE;
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@ -227,4 +226,4 @@ U_BOOT_CMD(
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"Program the OTP fuses on the PMIC PF0100",
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""
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);
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#endif
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#endif /* CONFIG_SPL_BUILD */
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014-2016, Toradex AG
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* Copyright (C) 2014-2019, Toradex AG
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*/
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/*
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@ -52,6 +52,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_DWC_AHSATA=y
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CONFIG_DFU_MMC=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_FSL_ESDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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@ -34,12 +34,12 @@
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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/* OCOTP Configs */
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#ifdef CONFIG_CMD_FUSE
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