armv8/fsl-lsch3: Implement workaround for I2C erratum A009203
This erratum requires setting GLITCH_EN bit in debug register to enable digital filter to improve clock stability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
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@ -37,11 +37,45 @@ static void erratum_rcw_src(void)
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#endif
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}
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#define I2C_DEBUG_REG 0x6
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#define I2C_GLITCH_EN 0x8
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/*
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* This erratum requires setting glitch_en bit to enable
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* digital glitch filter to improve clock stability.
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*/
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static void erratum_a009203(void)
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{
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u8 __iomem *ptr;
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#ifdef CONFIG_SYS_I2C
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#ifdef I2C1_BASE_ADDR
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ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
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writeb(I2C_GLITCH_EN, ptr);
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#endif
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#ifdef I2C2_BASE_ADDR
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ptr = (u8 __iomem *)(I2C2_BASE_ADDR + I2C_DEBUG_REG);
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writeb(I2C_GLITCH_EN, ptr);
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#endif
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#ifdef I2C3_BASE_ADDR
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ptr = (u8 __iomem *)(I2C3_BASE_ADDR + I2C_DEBUG_REG);
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writeb(I2C_GLITCH_EN, ptr);
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#endif
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#ifdef I2C4_BASE_ADDR
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ptr = (u8 __iomem *)(I2C4_BASE_ADDR + I2C_DEBUG_REG);
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writeb(I2C_GLITCH_EN, ptr);
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#endif
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#endif
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}
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void fsl_lsch3_early_init_f(void)
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{
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erratum_a008751();
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erratum_rcw_src();
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init_early_memctl_regs(); /* tighten IFC timing */
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erratum_a009203();
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}
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#ifdef CONFIG_SPL_BUILD
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