exynos: Enable the LCD backlight for snow
The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -11,9 +11,9 @@
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#include <i2c.h>
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#include <netdev.h>
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#include <spi.h>
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#include <asm/gpio.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/dwmmc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/power.h>
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@ -180,6 +180,59 @@ int exynos_power_init(void)
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#endif /* CONFIG_POWER */
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#ifdef CONFIG_LCD
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static int board_dp_bridge_setup(void)
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{
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const int max_tries = 10;
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int num_tries, node;
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/*
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* TODO(sjg): Use device tree for GPIOs when exynos GPIO
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* numbering patch is in mainline.
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*/
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debug("%s\n", __func__);
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node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_NXP_PTN3460);
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if (node < 0) {
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debug("%s: No node for DP bridge in device tree\n", __func__);
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return -ENODEV;
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}
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/* Setup the GPIOs */
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/* PD is ACTIVE_LOW, and initially de-asserted */
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gpio_set_pull(EXYNOS5_GPIO_Y25, S5P_GPIO_PULL_NONE);
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gpio_direction_output(EXYNOS5_GPIO_Y25, 1);
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/* Reset is ACTIVE_LOW */
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gpio_set_pull(EXYNOS5_GPIO_X15, S5P_GPIO_PULL_NONE);
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gpio_direction_output(EXYNOS5_GPIO_X15, 0);
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udelay(10);
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gpio_set_value(EXYNOS5_GPIO_X15, 1);
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gpio_direction_input(EXYNOS5_GPIO_X07);
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/*
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* We need to wait for 90ms after bringing up the bridge since there
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* is a phantom "high" on the HPD chip during its bootup. The phantom
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* high comes within 7ms of de-asserting PD and persists for at least
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* 15ms. The real high comes roughly 50ms after PD is de-asserted. The
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* phantom high makes it hard for us to know when the NXP chip is up.
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*/
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mdelay(90);
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for (num_tries = 0; num_tries < max_tries; num_tries++) {
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/* Check HPD. If it's high, we're all good. */
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if (gpio_get_value(EXYNOS5_GPIO_X07))
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return 0;
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debug("%s: eDP bridge failed to come up; try %d of %d\n",
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__func__, num_tries, max_tries);
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}
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/* Immediately go into bridge reset if the hp line is not high */
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return -ENODEV;
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}
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void exynos_cfg_lcd_gpio(void)
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{
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/* For Backlight */
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@ -198,4 +251,49 @@ void exynos_set_dp_phy(unsigned int onoff)
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{
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set_dp_phy_ctrl(onoff);
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}
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void exynos_backlight_on(unsigned int on)
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{
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debug("%s(%u)\n", __func__, on);
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if (!on)
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return;
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#ifdef CONFIG_POWER_TPS65090
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int ret;
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ret = tps65090_fet_enable(1); /* Enable FET1, backlight */
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if (ret)
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return;
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/* T5 in the LCD timing spec (defined as > 10ms) */
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mdelay(10);
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/* board_dp_backlight_pwm */
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gpio_direction_output(EXYNOS5_GPIO_B20, 1);
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/* T6 in the LCD timing spec (defined as > 10ms) */
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mdelay(10);
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/* board_dp_backlight_en */
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gpio_direction_output(EXYNOS5_GPIO_X30, 1);
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#endif
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}
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void exynos_lcd_power_on(void)
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{
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int ret;
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debug("%s\n", __func__);
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#ifdef CONFIG_POWER_TPS65090
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/* board_dp_lcd_vdd */
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tps65090_fet_enable(6); /* Enable FET6, lcd panel */
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#endif
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ret = board_dp_bridge_setup();
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if (ret && ret != -ENODEV)
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printf("LCD bridge failed to enable: %d\n", ret);
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}
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#endif
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@ -93,6 +93,7 @@ enum fdt_compat_id {
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COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */
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COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */
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COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */
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COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */
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COMPAT_COUNT,
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};
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@ -67,6 +67,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
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COMPAT(SANDBOX_HOST_EMULATION, "sandbox,host-emulation"),
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COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
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COMPAT(TI_TPS65090, "ti,tps65090"),
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COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
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};
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const char *fdtdec_get_compatible(enum fdt_compat_id id)
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