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configs: j721e_evm_r5: Enable raw access power management features

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Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
This commit is contained in:
Tero Kristo 2021-06-11 11:45:24 +03:00 committed by Lokesh Vutla
parent 61305e00c7
commit a95f8c0781
1 changed files with 10 additions and 2 deletions
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12
configs/j721e_evm_r5_defconfig
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@ -72,7 +72,7 @@ CONFIG_SPL_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
# CONFIG_CLK_TI_SCI is not set
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_NAVSS_UDMA=y
CONFIG_TI_SCI_PROTOCOL=y
@ -102,7 +102,7 @@ CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
CONFIG_TI_SCI_POWER_DOMAIN=y
# CONFIG_TI_SCI_POWER_DOMAIN is not set
CONFIG_DM_PMIC=y
CONFIG_PMIC_TPS65941=y
CONFIG_DM_REGULATOR=y
@ -140,3 +140,11 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_FS_EXT4=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_TI_POWER_DOMAIN=y
CONFIG_SPL_CLK_CCF=y
CONFIG_LIB_RATIONAL=y
CONFIG_SPL_LIB_RATIONAL=y
CONFIG_SPL_CLK_K3_PLL=y
CONFIG_SPL_CLK_K3=y
CONFIG_K3_DM_FW=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y