First set of u-boot-atmel features for the 2021.10 cycle
-----BEGIN PGP SIGNATURE----- iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmDLD78cHGV1Z2VuLmhy aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyLhSB/0UqOd+Ujf2meiHU9yr oOOCLxVTjTUfIZKLad/zwlj2Xqzsjs6XMawC95BgouvkQLmj/gwerRWcZPg9l7/X hvb9VJi+iJoLRRpBPbeF3bMb92kCE+YZodFXyutlcY+Z0ZB9755zoVgR6ccKfksd Xp2y8AFptfYQNZ1l0yb3lhm1261CldWALrGTjRpY2hQ8nEMbV8z6WUB1hAF9CECa PGbKaiqm9OdktwHsLy4cYFFCuzkykn6T3P6ODineP7IxgEgZKTfJClSTFGY9S0GQ kwd7K/7j0W3rI5NPknB+Fb4IFAaTs/oozR+5ml7j+2S3G5GXjSGx8zaSOmOZvpP3 KxwN =/I5V -----END PGP SIGNATURE----- Merge tag 'u-boot-atmel-2021.10-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for the 2021.10 cycle: This feature set converts the boards pm9261 and pm9263 Ethernet support to DM; enables hash command for all SAM boards; fixes the NAND pmecc bit-flips correction; adds Falcon boot for sama5d3_xplained board; and other minor adjustments.
This commit is contained in:
commit
a94b2aad05
@ -190,8 +190,8 @@
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/*
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* PMECC table in ROM
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*/
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#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
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#define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000
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#define ATMEL_PMECC_INDEX_OFFSET_512 0x10000
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#define ATMEL_PMECC_INDEX_OFFSET_1024 0x18000
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/*
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* SAMA5D3 specific prototypes
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@ -132,6 +132,13 @@ void spl_board_init(void)
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#endif
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}
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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return 0;
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}
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#endif
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static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
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{
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ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
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@ -20,10 +20,6 @@
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#include <asm/arch/at91_matrix.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
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#include <net.h>
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#endif
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#include <netdev.h>
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#include <asm/mach-types.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -80,36 +76,6 @@ static void pm9261_nand_hw_init(void)
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}
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#endif
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#ifdef CONFIG_DRIVER_DM9000
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static void pm9261_dm9000_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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/* Configure SMC CS2 for DM9000 */
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[2].setup);
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
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AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
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&smc->cs[2].pulse);
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writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
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&smc->cs[2].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
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AT91_SMC_MODE_TDF_CYCLE(1),
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&smc->cs[2].mode);
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/* Configure Interrupt pin as input, no pull-up */
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
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}
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#endif
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int board_early_init_f(void)
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{
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return 0;
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@ -132,13 +98,6 @@ int board_init(void)
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return 0;
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}
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#ifdef CONFIG_DRIVER_DM9000
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int board_eth_init(struct bd_info *bis)
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{
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return dm9000_initialize(bis);
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}
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#endif
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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@ -155,19 +114,6 @@ int dram_init_banksize(void)
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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#ifdef CONFIG_DRIVER_DM9000
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/*
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* Initialize ethernet HW addr prior to starting Linux,
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* needed for nfsroot
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*/
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eth_init();
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#endif
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}
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard (void)
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{
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@ -19,17 +19,13 @@
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#include <asm/arch/at91_matrix.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
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#include <net.h>
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#endif
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#include <netdev.h>
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#include <asm/mach-types.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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* Miscellaneous platform dependent initializations
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*/
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#ifdef CONFIG_CMD_NAND
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@ -73,41 +69,6 @@ static void pm9263_nand_hw_init(void)
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}
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#endif
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#ifdef CONFIG_MACB
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static void pm9263_macb_hw_init(void)
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{
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/*
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* PB27 enables the 50MHz oscillator for Ethernet PHY
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* 1 - enable
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* 0 - disable
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*/
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at91_set_pio_output(AT91_PIO_PORTB, 27, 1);
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at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */
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at91_periph_clk_enable(ATMEL_ID_EMAC);
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/*
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* Disable pull-up on:
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* RXDV (PC25) => PHY normal mode (not Test mode)
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* ERX0 (PE25) => PHY ADDR0
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* ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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at91_set_pio_pullup(AT91_PIO_PORTC, 25, 0);
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at91_set_pio_pullup(AT91_PIO_PORTE, 25, 0);
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at91_set_pio_pullup(AT91_PIO_PORTE, 26, 0);
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/* Re-enable pull-up */
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at91_set_pio_pullup(AT91_PIO_PORTC, 25, 1);
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at91_set_pio_pullup(AT91_PIO_PORTE, 25, 1);
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at91_set_pio_pullup(AT91_PIO_PORTE, 26, 1);
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at91_macb_hw_init();
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}
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#endif
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#ifdef CONFIG_LCD
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#ifdef CONFIG_LCD_IN_PSRAM
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@ -205,7 +166,7 @@ static void pm9263_lcd_hw_init(void)
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at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power down */
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#ifdef CONFIG_LCD_IN_PSRAM
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/* initialize te PSRAM */
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/* initialize the PSRAM */
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int stat = pm9263_lcd_hw_psram_init();
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gd->fb_base = (stat == 0) ? PHYS_PSRAM : ATMEL_BASE_SRAM0;
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@ -224,18 +185,15 @@ int board_early_init_f(void)
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int board_init(void)
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{
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/* arch number of AT91SAM9263EK-Board */
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/* arch number of PM9263 Board */
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gd->bd->bi_arch_number = MACH_TYPE_PM9263;
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/* adress of boot parameters */
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_CMD_NAND
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pm9263_nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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pm9263_macb_hw_init();
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#endif
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#ifdef CONFIG_USB_OHCI_NEW
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at91_uhp_hw_init();
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#endif
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@ -247,7 +205,7 @@ int board_init(void)
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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/* dram_init must store complete RAM size in gd->ram_size */
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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@ -261,21 +219,6 @@ int dram_init_banksize(void)
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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}
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#endif
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int board_eth_init(struct bd_info *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
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#endif
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return rc;
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}
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard (void)
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{
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@ -21,7 +21,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway"
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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CONFIG_NAND_BOOT=y
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CONFIG_BOOTDELAY=3
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CONFIG_BOOTDELAY=0
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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@ -46,8 +46,8 @@ CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_MTDIDS_DEFAULT="nand0=nand0"
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CONFIG_MTDPARTS_DEFAULT="nand0:1536k(uboot),1024k(unused),512k(dtb_old),4608k(kernel_old),86528k(ubi),-(rootfs_old)"
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CONFIG_MTDIDS_DEFAULT="nand0=atmel_nand"
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CONFIG_MTDPARTS_DEFAULT="atmel_nand:1536k(uboot),10752k(unused),-(ubi)"
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CONFIG_CMD_UBI=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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@ -55,8 +55,8 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt
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CONFIG_ENV_IS_IN_UBI=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_ENV_UBI_PART="ubi"
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CONFIG_ENV_UBI_VOLUME="env"
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CONFIG_ENV_UBI_VOLUME_REDUND="env_r"
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CONFIG_ENV_UBI_VOLUME="uboot_env0"
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CONFIG_ENV_UBI_VOLUME_REDUND="uboot_env1"
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM=y
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@ -25,8 +25,6 @@ CONFIG_SYS_PROMPT="pm9261> "
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CONFIG_CMD_NAND=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)"
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@ -34,6 +32,7 @@ CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_ENV_ADDR=0x10040000
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# CONFIG_NET is not set
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CONFIG_DM=y
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CONFIG_BLK=y
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CONFIG_CLK=y
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@ -62,3 +61,4 @@ CONFIG_USB_STORAGE=y
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CONFIG_DM_VIDEO=y
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# CONFIG_VIDEO_BPP32 is not set
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CONFIG_LCD=y
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CONFIG_REGEX=y
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@ -50,6 +50,8 @@ CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_SPI_FLASH_DATAFLASH=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_DM_SERIAL=y
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CONFIG_ATMEL_USART=y
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CONFIG_SPI=y
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@ -25,10 +25,14 @@ CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_DM=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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CONFIG_CMD_NAND_TRIMFFS=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_FAT=y
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@ -47,6 +51,11 @@ CONFIG_I2C_EEPROM=y
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CONFIG_MICROCHIP_FLEXCOM=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ATMEL=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_ATMEL_NAND_HW_PMECC=y
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CONFIG_PMECC_CAP=8
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CONFIG_PHY_MICREL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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@ -32,6 +32,8 @@ CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_UBI=y
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CONFIG_OF_CONTROL=y
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@ -33,6 +33,8 @@ CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_UBI=y
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CONFIG_OF_CONTROL=y
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@ -39,6 +39,8 @@ CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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@ -40,6 +40,8 @@ CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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@ -40,6 +40,8 @@ CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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|
@ -26,6 +26,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
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CONFIG_SD_BOOT=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_MISC_INIT_R=y
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@ -41,6 +42,8 @@ CONFIG_CMD_MMC=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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|
@ -46,6 +46,8 @@ CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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|
@ -41,6 +41,8 @@ CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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|
@ -32,6 +32,8 @@ CONFIG_CMD_NAND=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_HASH=y
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CONFIG_HASH_VERIFY=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -32,6 +32,8 @@ CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -38,6 +38,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -40,6 +40,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -40,6 +40,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -44,6 +44,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -40,6 +40,8 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
|
@ -40,6 +40,8 @@ CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
|
@ -39,6 +39,8 @@ CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
|
@ -39,6 +39,8 @@ CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
|
@ -44,6 +44,8 @@ CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
|
@ -33,6 +33,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -33,6 +33,8 @@ CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_HASH=y
|
||||
CONFIG_HASH_VERIFY=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
|
@ -493,21 +493,9 @@ static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf,
|
||||
{
|
||||
struct nand_chip *nand_chip = mtd_to_nand(mtd);
|
||||
struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
|
||||
int i, err_nbr, eccbytes;
|
||||
uint8_t *buf_pos;
|
||||
int i, err_nbr;
|
||||
u8 *buf_pos, *ecc_pos;
|
||||
|
||||
/* SAMA5D4 PMECC IP can correct errors for all 0xff page */
|
||||
if (host->pmecc_version >= PMECC_VERSION_SAMA5D4)
|
||||
goto normal_check;
|
||||
|
||||
eccbytes = nand_chip->ecc.bytes;
|
||||
for (i = 0; i < eccbytes; i++)
|
||||
if (ecc[i] != 0xff)
|
||||
goto normal_check;
|
||||
/* Erased page, return OK */
|
||||
return 0;
|
||||
|
||||
normal_check:
|
||||
for (i = 0; i < host->pmecc_sector_number; i++) {
|
||||
err_nbr = 0;
|
||||
if (pmecc_stat & 0x1) {
|
||||
@ -518,15 +506,26 @@ normal_check:
|
||||
pmecc_get_sigma(mtd);
|
||||
|
||||
err_nbr = pmecc_err_location(mtd);
|
||||
if (err_nbr == -1) {
|
||||
if (err_nbr >= 0) {
|
||||
pmecc_correct_data(mtd, buf_pos, ecc, i,
|
||||
host->pmecc_bytes_per_sector,
|
||||
err_nbr);
|
||||
} else if (host->pmecc_version < PMECC_VERSION_SAMA5D4) {
|
||||
ecc_pos = ecc + i * host->pmecc_bytes_per_sector;
|
||||
|
||||
err_nbr = nand_check_erased_ecc_chunk(
|
||||
buf_pos, host->pmecc_sector_size,
|
||||
ecc_pos, host->pmecc_bytes_per_sector,
|
||||
NULL, 0, host->pmecc_corr_cap);
|
||||
}
|
||||
|
||||
if (err_nbr < 0) {
|
||||
dev_err(mtd->dev, "PMECC: Too many errors\n");
|
||||
mtd->ecc_stats.failed++;
|
||||
return -EBADMSG;
|
||||
} else {
|
||||
pmecc_correct_data(mtd, buf_pos, ecc, i,
|
||||
host->pmecc_bytes_per_sector, err_nbr);
|
||||
mtd->ecc_stats.corrected += err_nbr;
|
||||
}
|
||||
|
||||
mtd->ecc_stats.corrected += err_nbr;
|
||||
}
|
||||
pmecc_stat >>= 1;
|
||||
}
|
||||
|
@ -173,15 +173,6 @@
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
|
||||
/* Ethernet */
|
||||
#define CONFIG_DRIVER_DM9000 1
|
||||
#define CONFIG_DM9000_BASE 0x30000000
|
||||
#define DM9000_IO CONFIG_DM9000_BASE
|
||||
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
|
||||
#define CONFIG_DM9000_USE_16BIT 1
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_RESET_PHY_R 1
|
||||
|
||||
/* USB */
|
||||
#define CONFIG_USB_ATMEL
|
||||
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
|
||||
|
@ -5,7 +5,7 @@
|
||||
* Lead Tech Design <www.leadtechdesign.com>
|
||||
* Ilko Iliev <www.ronetix.at>
|
||||
*
|
||||
* Configuation settings for the RONETIX PM9263 board.
|
||||
* Configuration settings for the RONETIX PM9263 board.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
@ -204,12 +204,6 @@
|
||||
AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED | \
|
||||
AT91_MATRIX_SCFG_SLOT_CYCLE(255))
|
||||
|
||||
/* Ethernet */
|
||||
#define CONFIG_MACB 1
|
||||
#define CONFIG_RMII 1
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_RESET_PHY_R 1
|
||||
|
||||
/* USB */
|
||||
#define CONFIG_USB_ATMEL
|
||||
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
|
||||
|
@ -79,4 +79,18 @@
|
||||
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
|
||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
|
||||
|
||||
/* Falcon boot support on raw MMC */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
|
||||
/* U-Boot proper stored by default at 0x200 (256 KiB) */
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
|
||||
#define CONFIG_SYS_SPL_ARGS_ADDR 0x22000000
|
||||
|
||||
/* Falcon boot support on FAT on MMC */
|
||||
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
|
||||
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
|
||||
|
||||
/* Falcon boot support on raw NAND */
|
||||
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x1a0000
|
||||
|
||||
#endif
|
||||
|
@ -11,7 +11,7 @@
|
||||
|
||||
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
|
||||
|
||||
#define CONFIG_SYS_BOOTM_LEN SZ_32M
|
||||
/* SDRAM */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x60000000
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
|
||||
|
Loading…
Reference in New Issue
Block a user