Minor Coding Style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
parent
256176d3d5
commit
a7676ea773
124
CHANGELOG
124
CHANGELOG
@ -1,3 +1,9 @@
|
||||
commit d62f64cc23a940eafe712c776b3249e4160753d1
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Wed May 16 00:13:33 2007 +0200
|
||||
|
||||
Coding Style Cleanup, new CHANGELOG
|
||||
|
||||
commit 7d98ba770a7eaefa29ce927f31a0956df85bf650
|
||||
Author: Piotr Kruszynski <ppk@semihalf.com>
|
||||
Date: Thu May 10 16:55:52 2007 +0200
|
||||
@ -295,6 +301,14 @@ Date: Fri May 4 10:02:33 2007 +0200
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit 068aab660bc3912b930be5540e6b3f3fd6ad3c96
|
||||
Author: Kim Phillips <kim.phillips@freescale.com>
|
||||
Date: Thu May 3 19:43:52 2007 -0500
|
||||
|
||||
mpc83xx: fix trivial error in MAKEALL
|
||||
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit c64a89d6ce8584b9fc64f4e85da9ecac3cfc2c2a
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Thu May 3 16:34:41 2007 +0200
|
||||
@ -376,6 +390,33 @@ Date: Wed Feb 7 15:28:04 2007 -0600
|
||||
Signed-off-by: James Yang <James.Yang@freescale.com>
|
||||
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
||||
|
||||
commit f64702b7fc8f8df39d31add770df6e372f9e9ce3
|
||||
Author: Timur Tabi <timur@freescale.com>
|
||||
Date: Mon Apr 30 13:59:50 2007 -0500
|
||||
|
||||
Fix memory initialization on MPC8349E-mITX
|
||||
|
||||
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
|
||||
This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
|
||||
on some ITX boards, notably those with a revision 3.1 CPU.
|
||||
|
||||
Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
|
||||
ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
|
||||
|
||||
Signed-off-by: Timur Tabi <timur@freescale.com>
|
||||
Acked-by: Michael Benedict <MBenedict@twacs.com>
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit 54b2d434ae9d01787936f34fe1759cf3d7624ae3
|
||||
Author: Kim Phillips <kim.phillips@freescale.com>
|
||||
Date: Mon Apr 30 15:26:21 2007 -0500
|
||||
|
||||
mpc83xx: replace elaborate boottime verbosity with 'clocks' command
|
||||
|
||||
and fix CPU: to align with Board: display text.
|
||||
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit c1ab82669d9525998c34e802a12cad662723f22a
|
||||
Author: James Yang <James.Yang@freescale.com>
|
||||
Date: Fri Mar 16 13:02:53 2007 -0500
|
||||
@ -395,6 +436,12 @@ Date: Sun Apr 29 14:13:01 2007 +0200
|
||||
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit 5c5d3242935cf3543af01142627494434834cf98
|
||||
Author: Kim Phillips <kim.phillips@freescale.com>
|
||||
Date: Wed Apr 25 12:34:38 2007 -0500
|
||||
|
||||
mpc83xx: minor fixups for 8313rdb introduction
|
||||
|
||||
commit 144876a380f5756f57412caf74c1d6dc201dd796
|
||||
Author: Michal Simek <monstr@monstr.eu>
|
||||
Date: Tue Apr 24 23:01:02 2007 +0200
|
||||
@ -626,6 +673,71 @@ Date: Thu Dec 14 14:14:55 2006 +0800
|
||||
board.
|
||||
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
|
||||
|
||||
commit 96b8a05432f346f36493535c85320b70ec9c7c1b
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:54:15 2007 -0500
|
||||
|
||||
mpc83xx: Add MPC8313ERDB support.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit 49ea3b6eafe606285ae4d5c378026153dde53200
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:34:21 2007 -0500
|
||||
|
||||
mpc83xx: Add generic PCI setup code.
|
||||
|
||||
Board code can now request the generic setup code rather than having to
|
||||
copy-and-paste it for themselves. Boards should be converted to use this
|
||||
once they're tested with it.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit 7c98e5193e93df6b9b651851d54b638a61ebb0ea
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:34:19 2007 -0500
|
||||
|
||||
mpc83xx: Add 831x support to speed.c.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit 0f253283a32d91e06844d7f87f9b33f4f4fbce8f
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:34:18 2007 -0500
|
||||
|
||||
mpc83xx: Add 831x support to global_data.h
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit 95e7ef897e54591e615fc1b458b74c286fe1fb06
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:34:16 2007 -0500
|
||||
|
||||
mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().
|
||||
|
||||
Rather than misleadingly define PVR_83xx as the specific type of 83xx
|
||||
being built for, the PVR of each core revision is defined. checkcpu() now
|
||||
prints the core that it detects, rather than aborting if it doesn't find
|
||||
what it thinks it wants.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit a35b0c4950d84cf9e3a9e32b916135956d1ac636
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:34:15 2007 -0500
|
||||
|
||||
mpc83xx: Recognize SPR values for MPC8311 and MPC8313.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit d87c57b201b4572d16f1b642998faa00c9912b16
|
||||
Author: Scott Wood <scottwood@freescale.com>
|
||||
Date: Mon Apr 16 14:31:55 2007 -0500
|
||||
|
||||
mpc83xx: Add register definitions for MPC831x.
|
||||
|
||||
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
||||
|
||||
commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
|
||||
Author: Stefan Roese <sr@denx.de>
|
||||
Date: Mon Apr 23 12:00:22 2007 +0200
|
||||
@ -1134,6 +1246,18 @@ Date: Fri Apr 13 08:02:24 2007 +0200
|
||||
Signed-of-by: Greg Lopp <lopp@pobox.com>
|
||||
Acked-by: Grant Likely <grant.likely@secretlab.ca>
|
||||
|
||||
commit 6fbf261f8df294e589cfadebebe5468e3c0f29e9
|
||||
Author: Xie Xiaobo <r63061@freescale.com>
|
||||
Date: Fri Mar 9 19:08:25 2007 +0800
|
||||
|
||||
Fix two bugs for MPC83xx DDR2 controller SPD Init
|
||||
|
||||
There are a few bugs in the cpu/mpc83xx/spd_sdram.c
|
||||
the first bug is that the picos_to_clk routine introduces a huge
|
||||
rounding error in 83xx.
|
||||
the second bug is that the mode register write recovery field is
|
||||
tWR-1, not tWR >> 1.
|
||||
|
||||
commit 2ad3aba01d37b72e7c957b07e102fccd64fe6d13
|
||||
Author: Jeffrey Mann <mannj@embeddedplanet.com>
|
||||
Date: Thu Apr 12 14:15:59 2007 +0200
|
||||
|
||||
@ -18,14 +18,6 @@
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* History
|
||||
* 20061201: Wilson Lo (Wilson.Lo@freescale.com)
|
||||
* Initialized
|
||||
* 20061210: Tanya Jiang (tanya.jiang@freescale.com)
|
||||
* Code Cleanup
|
||||
* 20070410: Scott Wood <scottwood@freescale.com>
|
||||
* More cleanup
|
||||
*/
|
||||
/*
|
||||
* mpc8313epb board configuration file
|
||||
@ -154,10 +146,10 @@
|
||||
#define CFG_FLASH_EMPTY_INFO /* display empty sectors */
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */
|
||||
|
||||
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \
|
||||
(2 << BR_PS_SHIFT) | /* 16 bit port size */ \
|
||||
BR_V) /* valid */
|
||||
#define CFG_OR0_PRELIM ( 0xFF000000 /* 16 MByte */ \
|
||||
#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \
|
||||
(2 << BR_PS_SHIFT) | /* 16 bit port size */ \
|
||||
BR_V) /* valid */
|
||||
#define CFG_OR0_PRELIM ( 0xFF000000 /* 16 MByte */ \
|
||||
| OR_GPCM_XACS \
|
||||
| OR_GPCM_SCY_9 \
|
||||
| OR_GPCM_EHTR \
|
||||
@ -197,20 +189,20 @@
|
||||
| (0xFF << LBCR_BMT_SHIFT) \
|
||||
| 0xF ) /* 0x0004ff0f */
|
||||
|
||||
#define CFG_LBC_MRTPR 0x20000000 /*TODO */ /* LB refresh timer prescal, 266MHz/32 */
|
||||
#define CFG_LBC_MRTPR 0x20000000 /*TODO */ /* LB refresh timer prescal, 266MHz/32 */
|
||||
|
||||
/* drivers/nand/nand.c */
|
||||
#define CFG_NAND_BASE 0xE2800000 /* 0xF0000000 */
|
||||
#define CFG_NAND_BASE 0xE2800000 /* 0xF0000000 */
|
||||
#define CFG_MAX_NAND_DEVICE 1
|
||||
#define NAND_MAX_CHIPS 1
|
||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
||||
|
||||
#define CFG_BR1_PRELIM ( CFG_NAND_BASE \
|
||||
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
|
||||
| BR_PS_8 /* Port Size = 8 bit */ \
|
||||
| BR_MS_FCM /* MSEL = FCM */ \
|
||||
| BR_V ) /* valid */
|
||||
#define CFG_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
|
||||
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
|
||||
| BR_PS_8 /* Port Size = 8 bit */ \
|
||||
| BR_MS_FCM /* MSEL = FCM */ \
|
||||
| BR_V ) /* valid */
|
||||
#define CFG_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
|
||||
| OR_FCM_CSCT \
|
||||
| OR_FCM_CST \
|
||||
| OR_FCM_CHT \
|
||||
@ -378,7 +370,7 @@
|
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
|
||||
@ -395,7 +387,7 @@
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
|
||||
|
||||
#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
|
||||
#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
|
||||
|
||||
#ifdef CFG_66MHZ
|
||||
|
||||
@ -439,12 +431,12 @@
|
||||
HRCWH_LALE_NORMAL)
|
||||
|
||||
/* System IO Config */
|
||||
#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
|
||||
#define CFG_SICRL SICRL_USBDR /* Enable Internal USB Phy */
|
||||
#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
|
||||
#define CFG_SICRL SICRL_USBDR /* Enable Internal USB Phy */
|
||||
|
||||
#define CFG_HID0_INIT 0x000000000
|
||||
#define CFG_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
|
||||
HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
|
||||
HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
|
||||
|
||||
#define CFG_HID2 HID2_HBE
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user