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Workaround and bug fix for Freescale PowerPC

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Add workaround for Freescale USB erratum A005275.
 Correct RCW macros for T1080.
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Merge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx

Workaround and bug fix for Freescale PowerPC

Add workaround for Freescale USB erratum A005275.
Correct RCW macros for T1080.
This commit is contained in:
Tom Rini 2018-10-30 16:53:42 -04:00
commit a744370e6f
9 changed files with 65 additions and 7 deletions
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8
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@ -659,6 +659,7 @@ config ARCH_P1010
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_A007075
select SYS_FSL_ERRATUM_ESDHC111
@ -821,6 +822,7 @@ config ARCH_P2041
select FSL_LAW
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
select SYS_FSL_ERRATUM_DDR_A003
@ -845,6 +847,7 @@ config ARCH_P3041
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
@ -910,6 +913,7 @@ config ARCH_P5020
select FSL_LAW
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_ERRATUM_DDR_A003474
@ -935,6 +939,7 @@ config ARCH_P5040
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004699
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
@ -1303,6 +1308,9 @@ config SYS_FSL_ERRATUM_A005812
config SYS_FSL_ERRATUM_A005871
bool
config SYS_FSL_ERRATUM_A005275
bool
config SYS_FSL_ERRATUM_A006261
bool

4
arch/powerpc/cpu/mpc85xx/cmd_errata.c
View File

@ -307,6 +307,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
puts("Work-around for Erratum I2C-A004447 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A005275
if (has_erratum_a005275())
puts("Work-around for Erratum A005275 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
if (has_erratum_a006261())
puts("Work-around for Erratum A006261 enabled\n");

5
arch/powerpc/include/asm/immap_85xx.h
View File

@ -1785,11 +1785,10 @@ typedef struct ccsr_gur {
#define FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_MII 0x20000000
#define FSL_CORENET_RCWSR13_EC2 0x0c000000 /* bits 420..421 */
#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII 0x00000000
#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x10000000
#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000
#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x04000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x80000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080
#define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 0x28
#define PXCKEN_MASK 0x80000000
#define PXCK_MASK 0x00FF0000

3
drivers/net/fm/t1040.c
View File

@ -41,9 +41,6 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
if ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) ==
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII)
return PHY_INTERFACE_MODE_RGMII;
else if ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) ==
FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII)
return PHY_INTERFACE_MODE_MII;
}
switch (port) {

28
drivers/usb/common/fsl-errata.c
View File

@ -6,6 +6,7 @@
*/
#include <common.h>
#include <hwconfig.h>
#include <fsl_errata.h>
#include<fsl_usb.h>
#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
@ -44,6 +45,33 @@ bool has_dual_phy(void)
return false;
}
bool has_erratum_a005275(void)
{
u32 svr = get_svr();
u32 soc = SVR_SOC_VER(svr);
if (hwconfig("no_erratum_a005275"))
return false;
switch (soc) {
#ifdef CONFIG_PPC
case SVR_P3041:
case SVR_P2041:
case SVR_P2040:
return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
case SVR_P5010:
case SVR_P5020:
case SVR_P5021:
return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
case SVR_P5040:
case SVR_P1010:
return IS_SVR_REV(svr, 1, 0);
#endif
}
return false;
}
bool has_erratum_a006261(void)
{
u32 svr = get_svr();

7
drivers/usb/host/ehci-fsl.c
View File

@ -93,6 +93,7 @@ static int ehci_fsl_probe(struct udevice *dev)
struct usb_ehci *ehci = NULL;
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
struct ehci_ctrl *ehci_ctrl = &priv->ehci;
/*
* Get the base address for EHCI controller from the device node
@ -107,6 +108,8 @@ static int ehci_fsl_probe(struct udevice *dev)
hcor = (struct ehci_hcor *)
((void *)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
ehci_ctrl->has_fsl_erratum_a005275 = has_erratum_a005275();
if (ehci_fsl_init(priv, ehci, hccr, hcor) < 0)
return -ENXIO;
@ -145,6 +148,8 @@ U_BOOT_DRIVER(ehci_fsl) = {
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct ehci_ctrl *ehci_ctrl = container_of(hccr,
struct ehci_ctrl, hccr);
struct usb_ehci *ehci = NULL;
switch (index) {
@ -163,6 +168,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
ehci_ctrl->has_fsl_erratum_a005275 = has_erratum_a005275();
return ehci_fsl_init(index, ehci, *hccr, *hcor);
}

12
drivers/usb/host/ehci-hcd.c
View File

@ -409,9 +409,15 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
/* Force FS for fsl HS quirk */
if (!ctrl->has_fsl_erratum_a005275)
endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
else
endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
qh->qh_endpt1 = cpu_to_hc32(endpt);
endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
qh->qh_endpt2 = cpu_to_hc32(endpt);
@ -832,6 +838,10 @@ static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
} else {
int ret;
/* Disable chirp for HS erratum */
if (ctrl->has_fsl_erratum_a005275)
reg |= PORTSC_FSL_PFSC;
reg |= EHCI_PS_PR;
reg &= ~EHCI_PS_PE;
ehci_writel(status_reg, reg);

4
drivers/usb/host/ehci.h
View File

@ -8,6 +8,7 @@
#ifndef USB_EHCI_H
#define USB_EHCI_H
#include <stdbool.h>
#include <usb.h>
#include <generic-phy.h>
@ -66,6 +67,8 @@ struct ehci_hcor {
#define PORTSC_PSPD_FS 0x0
#define PORTSC_PSPD_LS 0x1
#define PORTSC_PSPD_HS 0x2
#define PORTSC_FSL_PFSC BIT(24) /* PFSC bit to disable HS chirping */
uint32_t or_systune;
} __attribute__ ((packed, aligned(4)));
@ -251,6 +254,7 @@ struct ehci_ctrl {
uint32_t *periodic_list;
int periodic_schedules;
int ntds;
bool has_fsl_erratum_a005275; /* Freescale HS silicon quirk */
struct ehci_ops ops;
void *priv; /* client's private data */
};

1
include/fsl_usb.h
View File

@ -87,6 +87,7 @@ struct ccsr_usb_phy {
/* USB Erratum Checking code */
#if defined(CONFIG_PPC) || defined(CONFIG_ARM)
bool has_dual_phy(void);
bool has_erratum_a005275(void);
bool has_erratum_a006261(void);
bool has_erratum_a007075(void);
bool has_erratum_a007798(void);