Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
This commit is contained in:
Wolfgang Denk
commit
a694610d33
2
Makefile
2
Makefile
@ -246,7 +246,6 @@ LIBS += drivers/misc/libmisc.a
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|||||||
LIBS += drivers/mmc/libmmc.a
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LIBS += drivers/mmc/libmmc.a
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LIBS += drivers/mtd/libmtd.a
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LIBS += drivers/mtd/libmtd.a
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LIBS += drivers/mtd/nand/libnand.a
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LIBS += drivers/mtd/nand/libnand.a
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LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
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LIBS += drivers/mtd/onenand/libonenand.a
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LIBS += drivers/mtd/onenand/libonenand.a
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LIBS += drivers/mtd/ubi/libubi.a
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LIBS += drivers/mtd/ubi/libubi.a
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LIBS += drivers/mtd/spi/libspi_flash.a
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LIBS += drivers/mtd/spi/libspi_flash.a
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@ -428,7 +427,6 @@ TAG_SUBDIRS += drivers/misc
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TAG_SUBDIRS += drivers/mmc
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TAG_SUBDIRS += drivers/mmc
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TAG_SUBDIRS += drivers/mtd
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TAG_SUBDIRS += drivers/mtd
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TAG_SUBDIRS += drivers/mtd/nand
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TAG_SUBDIRS += drivers/mtd/nand
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TAG_SUBDIRS += drivers/mtd/nand_legacy
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TAG_SUBDIRS += drivers/mtd/onenand
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TAG_SUBDIRS += drivers/mtd/onenand
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TAG_SUBDIRS += drivers/mtd/spi
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TAG_SUBDIRS += drivers/mtd/spi
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TAG_SUBDIRS += drivers/net
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TAG_SUBDIRS += drivers/net
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1
README
1
README
@ -603,7 +603,6 @@ The following options need to be configured:
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CONFIG_CMD_DATE * support for RTC, date/time...
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CONFIG_CMD_DATE * support for RTC, date/time...
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CONFIG_CMD_DHCP * DHCP support
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CONFIG_CMD_DHCP * DHCP support
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CONFIG_CMD_DIAG * Diagnostics
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CONFIG_CMD_DIAG * Diagnostics
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CONFIG_CMD_DOC * Disk-On-Chip Support
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CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
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CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
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CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
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CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
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CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
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CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
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@ -23,7 +23,6 @@
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#include <common.h>
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#include <common.h>
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#if defined(CONFIG_CMD_NAND)
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#if defined(CONFIG_CMD_NAND)
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#if !defined(CONFIG_NAND_LEGACY)
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#include <nand.h>
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#include <nand.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa-regs.h>
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@ -550,7 +549,4 @@ int board_nand_init(struct nand_chip *nand)
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return 0;
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return 0;
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}
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}
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#else
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#error "U-Boot legacy NAND support not available for Monahans DFC."
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#endif
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#endif
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#endif
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@ -27,9 +27,6 @@
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#include <command.h>
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#include <command.h>
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#include <image.h>
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#include <image.h>
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#include <asm/byteorder.h>
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#include <asm/byteorder.h>
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#if defined(CONFIG_NAND_LEGACY)
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#include <linux/mtd/nand_legacy.h>
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#endif
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#include <fat.h>
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#include <fat.h>
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#include <part.h>
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#include <part.h>
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@ -58,20 +55,6 @@ extern int flash_sect_erase(ulong, ulong);
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extern int flash_sect_protect (int, ulong, ulong);
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extern int flash_sect_protect (int, ulong, ulong);
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extern int flash_write (char *, ulong, ulong);
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extern int flash_write (char *, ulong, ulong);
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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/* references to names in cmd_nand.c */
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#define NANDRW_READ 0x01
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#define NANDRW_WRITE 0x00
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#define NANDRW_JFFS2 0x02
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#define NANDRW_JFFS2_SKIP 0x04
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extern struct nand_chip nand_dev_desc[];
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extern int nand_legacy_rw(struct nand_chip* nand, int cmd,
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size_t start, size_t len,
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size_t * retlen, u_char * buf);
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extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
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size_t len, int clean);
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#endif
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extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
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extern block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
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int au_check_cksum_valid(int i, long nbytes)
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int au_check_cksum_valid(int i, long nbytes)
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@ -158,9 +141,6 @@ int au_do_update(int i, long sz)
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int off, rc;
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int off, rc;
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uint nbytes;
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uint nbytes;
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int k;
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int k;
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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int total;
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#endif
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hdr = (image_header_t *)LOAD_ADDR;
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hdr = (image_header_t *)LOAD_ADDR;
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#if defined(CONFIG_FIT)
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#if defined(CONFIG_FIT)
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@ -240,15 +220,6 @@ int au_do_update(int i, long sz)
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au_image[i].name);
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au_image[i].name);
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debug ("flash_sect_erase(%lx, %lx);\n", start, end);
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debug ("flash_sect_erase(%lx, %lx);\n", start, end);
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flash_sect_erase (start, end);
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flash_sect_erase (start, end);
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} else {
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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printf ("Updating NAND FLASH with image %s\n",
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au_image[i].name);
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debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
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rc = nand_legacy_erase (nand_dev_desc, start,
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end - start + 1, 0);
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debug ("nand_legacy_erase returned %x\n", rc);
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#endif
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}
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}
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udelay(10000);
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udelay(10000);
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@ -273,18 +244,7 @@ int au_do_update(int i, long sz)
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rc = flash_write ((char *)addr, start,
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rc = flash_write ((char *)addr, start,
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(nbytes + 1) & ~1);
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(nbytes + 1) & ~1);
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} else {
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} else {
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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debug ("nand_legacy_rw(%p, %lx, %x)\n",
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addr, start, nbytes);
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rc = nand_legacy_rw (nand_dev_desc,
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NANDRW_WRITE | NANDRW_JFFS2,
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start, nbytes, (size_t *)&total,
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(uchar *)addr);
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debug ("nand_legacy_rw: ret=%x total=%d nbytes=%d\n",
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rc, total, nbytes);
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#else
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rc = -1;
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rc = -1;
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#endif
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}
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}
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if (rc != 0) {
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if (rc != 0) {
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printf ("Flashing failed due to error %d\n", rc);
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printf ("Flashing failed due to error %d\n", rc);
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@ -297,16 +257,6 @@ int au_do_update(int i, long sz)
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if (au_image[i].type != AU_NAND) {
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if (au_image[i].type != AU_NAND) {
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rc = crc32 (0, (uchar *)(start + off),
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rc = crc32 (0, (uchar *)(start + off),
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image_get_data_size (hdr));
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image_get_data_size (hdr));
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} else {
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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rc = nand_legacy_rw (nand_dev_desc,
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NANDRW_READ | NANDRW_JFFS2 |
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NANDRW_JFFS2_SKIP,
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start, nbytes, (size_t *)&total,
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(uchar *)addr);
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rc = crc32 (0, (uchar *)(addr + off),
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image_get_data_size (hdr));
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#endif
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}
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}
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if (rc != image_get_dcrc (hdr)) {
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if (rc != image_get_dcrc (hdr)) {
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printf ("Image %s Bad Data Checksum After COPY\n",
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printf ("Image %s Bad Data Checksum After COPY\n",
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@ -148,21 +148,6 @@ phys_size_t initdram (int board_type)
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return ret;
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return ret;
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}
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}
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#if defined(CONFIG_CMD_NAND)
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#include <linux/mtd/nand_legacy.h>
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extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
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void nand_init(void)
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{
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nand_probe(CONFIG_SYS_NAND_BASE);
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if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
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print_size(nand_dev_desc[0].totlen, "\n");
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}
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}
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#endif
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#if 0 /* test-only !!! */
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#if 0 /* test-only !!! */
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int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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int do_dumpebc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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{
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@ -597,22 +597,6 @@ int board_early_init_f(void)
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return 0;
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return 0;
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}
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}
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#if defined(CONFIG_CMD_NAND)
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#include <linux/mtd/nand_legacy.h>
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extern ulong nand_probe(ulong physadr);
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extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
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void nand_init(void)
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{
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unsigned long totlen;
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totlen = nand_probe(CONFIG_SYS_NAND_BASE);
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printf ("%4lu MB\n", totlen >> 20);
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}
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#endif
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#ifdef CONFIG_HW_WATCHDOG
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#ifdef CONFIG_HW_WATCHDOG
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void hw_watchdog_reset(void)
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void hw_watchdog_reset(void)
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@ -555,21 +555,6 @@ int board_early_init_f(void)
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return 0;
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return 0;
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}
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}
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#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
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#include <linux/mtd/nand_legacy.h>
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extern ulong nand_probe(ulong physadr);
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extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
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|
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|
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void nand_init(void)
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{
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|
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unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE);
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|
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|
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printf ("%4lu MB\n", totlen >> 20);
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}
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|
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#endif
|
|
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|
|
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#if defined(CONFIG_CMD_PCMCIA)
|
#if defined(CONFIG_CMD_PCMCIA)
|
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|
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int pcmcia_init(void)
|
int pcmcia_init(void)
|
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|
|||||||
@ -595,22 +595,6 @@ int board_early_init_f(void)
|
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return 0;
|
return 0;
|
||||||
}
|
}
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|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
|
|
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#include <linux/mtd/nand_legacy.h>
|
|
||||||
|
|
||||||
extern ulong nand_probe(ulong physadr);
|
|
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extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
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|
|
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void nand_init(void)
|
|
||||||
{
|
|
||||||
unsigned long totlen;
|
|
||||||
|
|
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totlen = nand_probe(CONFIG_SYS_NAND_BASE);
|
|
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printf ("%4lu MB\n", totlen >> 20);
|
|
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}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
|
|
||||||
void hw_watchdog_reset(void)
|
void hw_watchdog_reset(void)
|
||||||
|
|||||||
@ -415,18 +415,3 @@ int board_early_init_f(void)
|
|||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
|
|
||||||
extern ulong nand_probe(ulong physadr);
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
|
|
||||||
void nand_init(void)
|
|
||||||
{
|
|
||||||
unsigned long totlen = nand_probe(CONFIG_SYS_NAND_BASE);
|
|
||||||
|
|
||||||
printf ("%4lu MB\n", totlen >> 20);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -31,10 +31,6 @@
|
|||||||
#include <asm/arch/mem.h>
|
#include <asm/arch/mem.h>
|
||||||
#include <i2c.h>
|
#include <i2c.h>
|
||||||
#include <asm/mach-types.h>
|
#include <asm/mach-types.h>
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
#endif
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
@ -846,22 +842,3 @@ void update_mux(u32 btype,u32 mtype)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
void nand_init(void)
|
|
||||||
{
|
|
||||||
extern flash_info_t flash_info[];
|
|
||||||
|
|
||||||
nand_probe(CONFIG_SYS_NAND_ADDR);
|
|
||||||
if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
|
|
||||||
print_size(nand_dev_desc[0].totlen, "\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_SYS_JFFS2_MEM_NAND
|
|
||||||
flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].flash_id = nand_dev_desc[0].id;
|
|
||||||
flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].size = 1024*1024*2; /* only read kernel single meg partition */
|
|
||||||
flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].sector_count = 1024; /* 1024 blocks in 16meg chip (use less for raw/copied partition) */
|
|
||||||
flash_info[CONFIG_SYS_JFFS2_FIRST_BANK].start[0] = 0x80200000; /* ?, ram for now, open question, copy to RAM or adapt for NAND */
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -107,17 +107,6 @@ ulong virt_to_phy_smdk6400(ulong addr)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_SYS_NAND_LEGACY)
|
|
||||||
#include <linux/mtd/nand.h>
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
void nand_init(void)
|
|
||||||
{
|
|
||||||
nand_probe(CONFIG_SYS_NAND_BASE);
|
|
||||||
if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN)
|
|
||||||
print_size(nand_dev_desc[0].totlen, "\n");
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
|
ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
|
||||||
{
|
{
|
||||||
if (banknum == 0) { /* non-CFI boot flash */
|
if (banknum == 0) { /* non-CFI boot flash */
|
||||||
|
|||||||
@ -33,11 +33,6 @@
|
|||||||
# include <status_led.h>
|
# include <status_led.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
#endif
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
#define ORMASK(size) ((-size) & OR_AM_MSK)
|
#define ORMASK(size) ((-size) & OR_AM_MSK)
|
||||||
|
|||||||
@ -574,22 +574,6 @@ int board_early_init_f(void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
|
|
||||||
extern ulong nand_probe(ulong physadr);
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
|
|
||||||
void nand_init(void)
|
|
||||||
{
|
|
||||||
unsigned long totlen;
|
|
||||||
|
|
||||||
totlen = nand_probe(CONFIG_SYS_NAND_BASE);
|
|
||||||
printf ("%4lu MB\n", totlen >> 20);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
|
|
||||||
void hw_watchdog_reset(void)
|
void hw_watchdog_reset(void)
|
||||||
|
|||||||
@ -23,7 +23,6 @@
|
|||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_CMD_NAND)
|
||||||
#ifdef CONFIG_NEW_NAND_CODE
|
|
||||||
|
|
||||||
#include <nand.h>
|
#include <nand.h>
|
||||||
#include <asm/arch/pxa-regs.h>
|
#include <asm/arch/pxa-regs.h>
|
||||||
@ -554,7 +553,4 @@ int board_nand_init(struct nand_chip *nand)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
|
||||||
#error "U-Boot legacy NAND support not available for Monahans DFC."
|
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -83,7 +83,6 @@ ifdef CONFIG_POST
|
|||||||
COBJS-$(CONFIG_CMD_DIAG) += cmd_diag.o
|
COBJS-$(CONFIG_CMD_DIAG) += cmd_diag.o
|
||||||
endif
|
endif
|
||||||
COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o
|
COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o
|
||||||
COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o
|
|
||||||
COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o
|
COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o
|
||||||
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
|
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
|
||||||
COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
|
COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
|
||||||
@ -150,7 +149,6 @@ COBJS-$(CONFIG_VFD) += cmd_vfd.o
|
|||||||
|
|
||||||
# others
|
# others
|
||||||
COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
|
COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
|
||||||
COBJS-$(CONFIG_CMD_DOC) += docecc.o
|
|
||||||
COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
|
COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
|
||||||
COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
|
COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
|
||||||
COBJS-y += flash.o
|
COBJS-y += flash.o
|
||||||
|
|||||||
1644
common/cmd_doc.c
1644
common/cmd_doc.c
File diff suppressed because it is too large
Load Diff
@ -96,12 +96,8 @@
|
|||||||
#include <cramfs/cramfs_fs.h>
|
#include <cramfs/cramfs_fs.h>
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_CMD_NAND)
|
||||||
#ifdef CONFIG_NAND_LEGACY
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
#else /* !CONFIG_NAND_LEGACY */
|
|
||||||
#include <linux/mtd/nand.h>
|
#include <linux/mtd/nand.h>
|
||||||
#include <nand.h>
|
#include <nand.h>
|
||||||
#endif /* !CONFIG_NAND_LEGACY */
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_ONENAND)
|
#if defined(CONFIG_CMD_ONENAND)
|
||||||
@ -187,12 +183,7 @@ static int mtd_device_validate(u8 type, u8 num, u32 *size)
|
|||||||
} else if (type == MTD_DEV_TYPE_NAND) {
|
} else if (type == MTD_DEV_TYPE_NAND) {
|
||||||
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
|
||||||
if (num < CONFIG_SYS_MAX_NAND_DEVICE) {
|
if (num < CONFIG_SYS_MAX_NAND_DEVICE) {
|
||||||
#ifndef CONFIG_NAND_LEGACY
|
|
||||||
*size = nand_info[num].size;
|
*size = nand_info[num].size;
|
||||||
#else
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
*size = nand_dev_desc[num].totlen;
|
|
||||||
#endif
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -267,17 +258,11 @@ static int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *d
|
|||||||
static inline u32 get_part_sector_size_nand(struct mtdids *id)
|
static inline u32 get_part_sector_size_nand(struct mtdids *id)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
|
||||||
#if defined(CONFIG_NAND_LEGACY)
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
|
|
||||||
return nand_dev_desc[id->num].erasesize;
|
|
||||||
#else
|
|
||||||
nand_info_t *nand;
|
nand_info_t *nand;
|
||||||
|
|
||||||
nand = &nand_info[id->num];
|
nand = &nand_info[id->num];
|
||||||
|
|
||||||
return nand->erasesize;
|
return nand->erasesize;
|
||||||
#endif
|
|
||||||
#else
|
#else
|
||||||
BUG();
|
BUG();
|
||||||
return 0;
|
return 0;
|
||||||
|
|||||||
@ -94,12 +94,8 @@
|
|||||||
#include <linux/mtd/mtd.h>
|
#include <linux/mtd/mtd.h>
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_CMD_NAND)
|
||||||
#ifdef CONFIG_NAND_LEGACY
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
#else /* !CONFIG_NAND_LEGACY */
|
|
||||||
#include <linux/mtd/nand.h>
|
#include <linux/mtd/nand.h>
|
||||||
#include <nand.h>
|
#include <nand.h>
|
||||||
#endif /* !CONFIG_NAND_LEGACY */
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_ONENAND)
|
#if defined(CONFIG_CMD_ONENAND)
|
||||||
@ -462,9 +458,6 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_NAND_LEGACY
|
|
||||||
jffs2_free_cache(part);
|
|
||||||
#endif
|
|
||||||
list_del(&part->link);
|
list_del(&part->link);
|
||||||
free(part);
|
free(part);
|
||||||
dev->num_parts--;
|
dev->num_parts--;
|
||||||
@ -491,9 +484,6 @@ static void part_delall(struct list_head *head)
|
|||||||
list_for_each_safe(entry, n, head) {
|
list_for_each_safe(entry, n, head) {
|
||||||
part_tmp = list_entry(entry, struct part_info, link);
|
part_tmp = list_entry(entry, struct part_info, link);
|
||||||
|
|
||||||
#ifdef CONFIG_NAND_LEGACY
|
|
||||||
jffs2_free_cache(part_tmp);
|
|
||||||
#endif
|
|
||||||
list_del(entry);
|
list_del(entry);
|
||||||
free(part_tmp);
|
free(part_tmp);
|
||||||
}
|
}
|
||||||
|
|||||||
@ -11,7 +11,6 @@
|
|||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
|
||||||
|
|
||||||
#ifndef CONFIG_NAND_LEGACY
|
|
||||||
/*
|
/*
|
||||||
*
|
*
|
||||||
* New NAND support
|
* New NAND support
|
||||||
@ -688,414 +687,3 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
|
|||||||
"[partition] | [[[loadAddr] dev] offset]"
|
"[partition] | [[[loadAddr] dev] offset]"
|
||||||
);
|
);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#else /* CONFIG_NAND_LEGACY */
|
|
||||||
/*
|
|
||||||
*
|
|
||||||
* Legacy NAND support - to be phased out
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#include <command.h>
|
|
||||||
#include <malloc.h>
|
|
||||||
#include <asm/io.h>
|
|
||||||
#include <watchdog.h>
|
|
||||||
|
|
||||||
#ifdef CONFIG_show_boot_progress
|
|
||||||
# include <status_led.h>
|
|
||||||
# define show_boot_progress(arg) show_boot_progress(arg)
|
|
||||||
#else
|
|
||||||
# define show_boot_progress(arg)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
#if 0
|
|
||||||
#include <linux/mtd/nand_ids.h>
|
|
||||||
#include <jffs2/jffs2.h>
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_OMAP1510
|
|
||||||
void archflashwp(void *archdata, int wp);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
|
|
||||||
|
|
||||||
#undef NAND_DEBUG
|
|
||||||
#undef PSYCHO_DEBUG
|
|
||||||
|
|
||||||
/* ****************** WARNING *********************
|
|
||||||
* When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
|
|
||||||
* erase (or at least attempt to erase) blocks that are marked
|
|
||||||
* bad. This can be very handy if you are _sure_ that the block
|
|
||||||
* is OK, say because you marked a good block bad to test bad
|
|
||||||
* block handling and you are done testing, or if you have
|
|
||||||
* accidentally marked blocks bad.
|
|
||||||
*
|
|
||||||
* Erasing factory marked bad blocks is a _bad_ idea. If the
|
|
||||||
* erase succeeds there is no reliable way to find them again,
|
|
||||||
* and attempting to program or erase bad blocks can affect
|
|
||||||
* the data in _other_ (good) blocks.
|
|
||||||
*/
|
|
||||||
#define ALLOW_ERASE_BAD_DEBUG 0
|
|
||||||
|
|
||||||
#define CONFIG_MTD_NAND_ECC /* enable ECC */
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
|
|
||||||
/* bits for nand_legacy_rw() `cmd'; or together as needed */
|
|
||||||
#define NANDRW_READ 0x01
|
|
||||||
#define NANDRW_WRITE 0x00
|
|
||||||
#define NANDRW_JFFS2 0x02
|
|
||||||
#define NANDRW_JFFS2_SKIP 0x04
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Imports from nand_legacy.c
|
|
||||||
*/
|
|
||||||
extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
|
|
||||||
extern int curr_device;
|
|
||||||
extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs,
|
|
||||||
size_t len, int clean);
|
|
||||||
extern int nand_legacy_rw(struct nand_chip *nand, int cmd, size_t start,
|
|
||||||
size_t len, size_t *retlen, u_char *buf);
|
|
||||||
extern void nand_print(struct nand_chip *nand);
|
|
||||||
extern void nand_print_bad(struct nand_chip *nand);
|
|
||||||
extern int nand_read_oob(struct nand_chip *nand, size_t ofs,
|
|
||||||
size_t len, size_t *retlen, u_char *buf);
|
|
||||||
extern int nand_write_oob(struct nand_chip *nand, size_t ofs,
|
|
||||||
size_t len, size_t *retlen, const u_char *buf);
|
|
||||||
|
|
||||||
|
|
||||||
int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
|
|
||||||
{
|
|
||||||
int rcode = 0;
|
|
||||||
|
|
||||||
switch (argc) {
|
|
||||||
case 0:
|
|
||||||
case 1:
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
return 1;
|
|
||||||
case 2:
|
|
||||||
if (strcmp (argv[1], "info") == 0) {
|
|
||||||
int i;
|
|
||||||
|
|
||||||
putc ('\n');
|
|
||||||
|
|
||||||
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; ++i) {
|
|
||||||
if (nand_dev_desc[i].ChipID ==
|
|
||||||
NAND_ChipID_UNKNOWN)
|
|
||||||
continue; /* list only known devices */
|
|
||||||
printf ("Device %d: ", i);
|
|
||||||
nand_print (&nand_dev_desc[i]);
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
} else if (strcmp (argv[1], "device") == 0) {
|
|
||||||
if ((curr_device < 0)
|
|
||||||
|| (curr_device >= CONFIG_SYS_MAX_NAND_DEVICE)) {
|
|
||||||
puts ("\nno devices available\n");
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
printf ("\nDevice %d: ", curr_device);
|
|
||||||
nand_print (&nand_dev_desc[curr_device]);
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
} else if (strcmp (argv[1], "bad") == 0) {
|
|
||||||
if ((curr_device < 0)
|
|
||||||
|| (curr_device >= CONFIG_SYS_MAX_NAND_DEVICE)) {
|
|
||||||
puts ("\nno devices available\n");
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
printf ("\nDevice %d bad blocks:\n", curr_device);
|
|
||||||
nand_print_bad (&nand_dev_desc[curr_device]);
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
}
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
return 1;
|
|
||||||
case 3:
|
|
||||||
if (strcmp (argv[1], "device") == 0) {
|
|
||||||
int dev = (int) simple_strtoul (argv[2], NULL, 10);
|
|
||||||
|
|
||||||
printf ("\nDevice %d: ", dev);
|
|
||||||
if (dev >= CONFIG_SYS_MAX_NAND_DEVICE) {
|
|
||||||
puts ("unknown device\n");
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
nand_print (&nand_dev_desc[dev]);
|
|
||||||
/*nand_print (dev); */
|
|
||||||
|
|
||||||
if (nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN) {
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
curr_device = dev;
|
|
||||||
|
|
||||||
puts ("... is now current device\n");
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
} else if (strcmp (argv[1], "erase") == 0
|
|
||||||
&& strcmp (argv[2], "clean") == 0) {
|
|
||||||
struct nand_chip *nand = &nand_dev_desc[curr_device];
|
|
||||||
ulong off = 0;
|
|
||||||
ulong size = nand->totlen;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
printf ("\nNAND erase: device %d offset %ld, size %ld ... ", curr_device, off, size);
|
|
||||||
|
|
||||||
ret = nand_legacy_erase (nand, off, size, 1);
|
|
||||||
|
|
||||||
printf ("%s\n", ret ? "ERROR" : "OK");
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
return 1;
|
|
||||||
default:
|
|
||||||
/* at least 4 args */
|
|
||||||
|
|
||||||
if (strncmp (argv[1], "read", 4) == 0 ||
|
|
||||||
strncmp (argv[1], "write", 5) == 0) {
|
|
||||||
ulong addr = simple_strtoul (argv[2], NULL, 16);
|
|
||||||
off_t off = simple_strtoul (argv[3], NULL, 16);
|
|
||||||
size_t size = simple_strtoul (argv[4], NULL, 16);
|
|
||||||
int cmd = (strncmp (argv[1], "read", 4) == 0) ?
|
|
||||||
NANDRW_READ : NANDRW_WRITE;
|
|
||||||
size_t total;
|
|
||||||
int ret;
|
|
||||||
char *cmdtail = strchr (argv[1], '.');
|
|
||||||
|
|
||||||
if (cmdtail && !strncmp (cmdtail, ".oob", 2)) {
|
|
||||||
/* read out-of-band data */
|
|
||||||
if (cmd & NANDRW_READ) {
|
|
||||||
ret = nand_read_oob (nand_dev_desc + curr_device,
|
|
||||||
off, size, &total,
|
|
||||||
(u_char *) addr);
|
|
||||||
} else {
|
|
||||||
ret = nand_write_oob (nand_dev_desc + curr_device,
|
|
||||||
off, size, &total,
|
|
||||||
(u_char *) addr);
|
|
||||||
}
|
|
||||||
return ret;
|
|
||||||
} else if (cmdtail && !strncmp (cmdtail, ".jffs2s", 7)) {
|
|
||||||
cmd |= NANDRW_JFFS2; /* skip bad blocks (on read too) */
|
|
||||||
if (cmd & NANDRW_READ)
|
|
||||||
cmd |= NANDRW_JFFS2_SKIP; /* skip bad blocks (on read too) */
|
|
||||||
} else if (cmdtail && !strncmp (cmdtail, ".jffs2", 2))
|
|
||||||
cmd |= NANDRW_JFFS2; /* skip bad blocks */
|
|
||||||
#ifdef SXNI855T
|
|
||||||
/* need ".e" same as ".j" for compatibility with older units */
|
|
||||||
else if (cmdtail && !strcmp (cmdtail, ".e"))
|
|
||||||
cmd |= NANDRW_JFFS2; /* skip bad blocks */
|
|
||||||
#endif
|
|
||||||
#ifdef CONFIG_SYS_NAND_SKIP_BAD_DOT_I
|
|
||||||
/* need ".i" same as ".jffs2s" for compatibility with older units (esd) */
|
|
||||||
/* ".i" for image -> read skips bad block (no 0xff) */
|
|
||||||
else if (cmdtail && !strcmp (cmdtail, ".i")) {
|
|
||||||
cmd |= NANDRW_JFFS2; /* skip bad blocks (on read too) */
|
|
||||||
if (cmd & NANDRW_READ)
|
|
||||||
cmd |= NANDRW_JFFS2_SKIP; /* skip bad blocks (on read too) */
|
|
||||||
}
|
|
||||||
#endif /* CONFIG_SYS_NAND_SKIP_BAD_DOT_I */
|
|
||||||
else if (cmdtail) {
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
printf ("\nNAND %s: device %d offset %ld, size %lu ...\n",
|
|
||||||
(cmd & NANDRW_READ) ? "read" : "write",
|
|
||||||
curr_device, off, (ulong)size);
|
|
||||||
|
|
||||||
ret = nand_legacy_rw (nand_dev_desc + curr_device,
|
|
||||||
cmd, off, size,
|
|
||||||
&total, (u_char *) addr);
|
|
||||||
|
|
||||||
printf (" %d bytes %s: %s\n", total,
|
|
||||||
(cmd & NANDRW_READ) ? "read" : "written",
|
|
||||||
ret ? "ERROR" : "OK");
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
} else if (strcmp (argv[1], "erase") == 0 &&
|
|
||||||
(argc == 4 || strcmp ("clean", argv[2]) == 0)) {
|
|
||||||
int clean = argc == 5;
|
|
||||||
ulong off =
|
|
||||||
simple_strtoul (argv[2 + clean], NULL, 16);
|
|
||||||
ulong size =
|
|
||||||
simple_strtoul (argv[3 + clean], NULL, 16);
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
printf ("\nNAND erase: device %d offset %ld, size %ld ...\n",
|
|
||||||
curr_device, off, size);
|
|
||||||
|
|
||||||
ret = nand_legacy_erase (nand_dev_desc + curr_device,
|
|
||||||
off, size, clean);
|
|
||||||
|
|
||||||
printf ("%s\n", ret ? "ERROR" : "OK");
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
} else {
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
rcode = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
return rcode;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
U_BOOT_CMD(
|
|
||||||
nand, 5, 1, do_nand,
|
|
||||||
"legacy NAND sub-system",
|
|
||||||
"info - show available NAND devices\n"
|
|
||||||
"nand device [dev] - show or set current device\n"
|
|
||||||
"nand read[.jffs2[s]] addr off size\n"
|
|
||||||
"nand write[.jffs2] addr off size - read/write `size' bytes starting\n"
|
|
||||||
" at offset `off' to/from memory address `addr'\n"
|
|
||||||
"nand erase [clean] [off size] - erase `size' bytes from\n"
|
|
||||||
" offset `off' (entire device if not specified)\n"
|
|
||||||
"nand bad - show bad blocks\n"
|
|
||||||
"nand read.oob addr off size - read out-of-band data\n"
|
|
||||||
"nand write.oob addr off size - read out-of-band data"
|
|
||||||
);
|
|
||||||
|
|
||||||
int do_nandboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|
||||||
{
|
|
||||||
char *boot_device = NULL;
|
|
||||||
char *ep;
|
|
||||||
int dev;
|
|
||||||
ulong cnt;
|
|
||||||
ulong addr;
|
|
||||||
ulong offset = 0;
|
|
||||||
image_header_t *hdr;
|
|
||||||
int rcode = 0;
|
|
||||||
#if defined(CONFIG_FIT)
|
|
||||||
const void *fit_hdr = NULL;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
show_boot_progress (52);
|
|
||||||
switch (argc) {
|
|
||||||
case 1:
|
|
||||||
addr = CONFIG_SYS_LOAD_ADDR;
|
|
||||||
boot_device = getenv ("bootdevice");
|
|
||||||
break;
|
|
||||||
case 2:
|
|
||||||
addr = simple_strtoul(argv[1], NULL, 16);
|
|
||||||
boot_device = getenv ("bootdevice");
|
|
||||||
break;
|
|
||||||
case 3:
|
|
||||||
addr = simple_strtoul(argv[1], NULL, 16);
|
|
||||||
boot_device = argv[2];
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
addr = simple_strtoul(argv[1], NULL, 16);
|
|
||||||
boot_device = argv[2];
|
|
||||||
offset = simple_strtoul(argv[3], NULL, 16);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
cmd_usage(cmdtp);
|
|
||||||
show_boot_progress (-53);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
show_boot_progress (53);
|
|
||||||
if (!boot_device) {
|
|
||||||
puts ("\n** No boot device **\n");
|
|
||||||
show_boot_progress (-54);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (54);
|
|
||||||
|
|
||||||
dev = simple_strtoul(boot_device, &ep, 16);
|
|
||||||
|
|
||||||
if ((dev >= CONFIG_SYS_MAX_NAND_DEVICE) ||
|
|
||||||
(nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
|
|
||||||
printf ("\n** Device %d not available\n", dev);
|
|
||||||
show_boot_progress (-55);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (55);
|
|
||||||
|
|
||||||
printf ("\nLoading from device %d: %s at 0x%lx (offset 0x%lx)\n",
|
|
||||||
dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
|
|
||||||
offset);
|
|
||||||
|
|
||||||
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ, offset,
|
|
||||||
SECTORSIZE, NULL, (u_char *)addr)) {
|
|
||||||
printf ("** Read error on %d\n", dev);
|
|
||||||
show_boot_progress (-56);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (56);
|
|
||||||
|
|
||||||
switch (genimg_get_format ((void *)addr)) {
|
|
||||||
case IMAGE_FORMAT_LEGACY:
|
|
||||||
hdr = (image_header_t *)addr;
|
|
||||||
image_print_contents (hdr);
|
|
||||||
|
|
||||||
cnt = image_get_image_size (hdr);
|
|
||||||
cnt -= SECTORSIZE;
|
|
||||||
break;
|
|
||||||
#if defined(CONFIG_FIT)
|
|
||||||
case IMAGE_FORMAT_FIT:
|
|
||||||
fit_hdr = (const void *)addr;
|
|
||||||
puts ("Fit image detected...\n");
|
|
||||||
|
|
||||||
cnt = fit_get_size (fit_hdr);
|
|
||||||
break;
|
|
||||||
#endif
|
|
||||||
default:
|
|
||||||
show_boot_progress (-57);
|
|
||||||
puts ("** Unknown image type\n");
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (57);
|
|
||||||
|
|
||||||
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ,
|
|
||||||
offset + SECTORSIZE, cnt, NULL,
|
|
||||||
(u_char *)(addr+SECTORSIZE))) {
|
|
||||||
printf ("** Read error on %d\n", dev);
|
|
||||||
show_boot_progress (-58);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (58);
|
|
||||||
|
|
||||||
#if defined(CONFIG_FIT)
|
|
||||||
/* This cannot be done earlier, we need complete FIT image in RAM first */
|
|
||||||
if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
|
|
||||||
if (!fit_check_format (fit_hdr)) {
|
|
||||||
show_boot_progress (-150);
|
|
||||||
puts ("** Bad FIT image format\n");
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
show_boot_progress (151);
|
|
||||||
fit_print_contents (fit_hdr);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Loading ok, update default load address */
|
|
||||||
|
|
||||||
load_addr = addr;
|
|
||||||
|
|
||||||
/* Check if we should attempt an auto-start */
|
|
||||||
if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
|
|
||||||
char *local_args[2];
|
|
||||||
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
|
|
||||||
|
|
||||||
local_args[0] = argv[0];
|
|
||||||
local_args[1] = NULL;
|
|
||||||
|
|
||||||
printf ("Automatic boot of image at addr 0x%08lx ...\n", addr);
|
|
||||||
|
|
||||||
do_bootm (cmdtp, 0, 1, local_args);
|
|
||||||
rcode = 1;
|
|
||||||
}
|
|
||||||
return rcode;
|
|
||||||
}
|
|
||||||
|
|
||||||
U_BOOT_CMD(
|
|
||||||
nboot, 4, 1, do_nandboot,
|
|
||||||
"boot from NAND device",
|
|
||||||
"loadAddr dev"
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* CONFIG_NAND_LEGACY */
|
|
||||||
|
|||||||
513
common/docecc.c
513
common/docecc.c
@ -1,513 +0,0 @@
|
|||||||
/*
|
|
||||||
* ECC algorithm for M-systems disk on chip. We use the excellent Reed
|
|
||||||
* Solmon code of Phil Karn (karn@ka9q.ampr.org) available under the
|
|
||||||
* GNU GPL License. The rest is simply to convert the disk on chip
|
|
||||||
* syndrom into a standard syndom.
|
|
||||||
*
|
|
||||||
* Author: Fabrice Bellard (fabrice.bellard@netgem.com)
|
|
||||||
* Copyright (C) 2000 Netgem S.A.
|
|
||||||
*
|
|
||||||
* $Id: docecc.c,v 1.4 2001/10/02 15:05:13 dwmw2 Exp $
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <config.h>
|
|
||||||
#include <common.h>
|
|
||||||
#include <malloc.h>
|
|
||||||
|
|
||||||
#undef ECC_DEBUG
|
|
||||||
#undef PSYCHO_DEBUG
|
|
||||||
|
|
||||||
#include <linux/mtd/doc2000.h>
|
|
||||||
|
|
||||||
/* need to undef it (from asm/termbits.h) */
|
|
||||||
#undef B0
|
|
||||||
|
|
||||||
#define MM 10 /* Symbol size in bits */
|
|
||||||
#define KK (1023-4) /* Number of data symbols per block */
|
|
||||||
#define B0 510 /* First root of generator polynomial, alpha form */
|
|
||||||
#define PRIM 1 /* power of alpha used to generate roots of generator poly */
|
|
||||||
#define NN ((1 << MM) - 1)
|
|
||||||
|
|
||||||
typedef unsigned short dtype;
|
|
||||||
|
|
||||||
/* 1+x^3+x^10 */
|
|
||||||
static const int Pp[MM+1] = { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 };
|
|
||||||
|
|
||||||
/* This defines the type used to store an element of the Galois Field
|
|
||||||
* used by the code. Make sure this is something larger than a char if
|
|
||||||
* if anything larger than GF(256) is used.
|
|
||||||
*
|
|
||||||
* Note: unsigned char will work up to GF(256) but int seems to run
|
|
||||||
* faster on the Pentium.
|
|
||||||
*/
|
|
||||||
typedef int gf;
|
|
||||||
|
|
||||||
/* No legal value in index form represents zero, so
|
|
||||||
* we need a special value for this purpose
|
|
||||||
*/
|
|
||||||
#define A0 (NN)
|
|
||||||
|
|
||||||
/* Compute x % NN, where NN is 2**MM - 1,
|
|
||||||
* without a slow divide
|
|
||||||
*/
|
|
||||||
static inline gf
|
|
||||||
modnn(int x)
|
|
||||||
{
|
|
||||||
while (x >= NN) {
|
|
||||||
x -= NN;
|
|
||||||
x = (x >> MM) + (x & NN);
|
|
||||||
}
|
|
||||||
return x;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define CLEAR(a,n) {\
|
|
||||||
int ci;\
|
|
||||||
for(ci=(n)-1;ci >=0;ci--)\
|
|
||||||
(a)[ci] = 0;\
|
|
||||||
}
|
|
||||||
|
|
||||||
#define COPY(a,b,n) {\
|
|
||||||
int ci;\
|
|
||||||
for(ci=(n)-1;ci >=0;ci--)\
|
|
||||||
(a)[ci] = (b)[ci];\
|
|
||||||
}
|
|
||||||
|
|
||||||
#define COPYDOWN(a,b,n) {\
|
|
||||||
int ci;\
|
|
||||||
for(ci=(n)-1;ci >=0;ci--)\
|
|
||||||
(a)[ci] = (b)[ci];\
|
|
||||||
}
|
|
||||||
|
|
||||||
#define Ldec 1
|
|
||||||
|
|
||||||
/* generate GF(2**m) from the irreducible polynomial p(X) in Pp[0]..Pp[m]
|
|
||||||
lookup tables: index->polynomial form alpha_to[] contains j=alpha**i;
|
|
||||||
polynomial form -> index form index_of[j=alpha**i] = i
|
|
||||||
alpha=2 is the primitive element of GF(2**m)
|
|
||||||
HARI's COMMENT: (4/13/94) alpha_to[] can be used as follows:
|
|
||||||
Let @ represent the primitive element commonly called "alpha" that
|
|
||||||
is the root of the primitive polynomial p(x). Then in GF(2^m), for any
|
|
||||||
0 <= i <= 2^m-2,
|
|
||||||
@^i = a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1)
|
|
||||||
where the binary vector (a(0),a(1),a(2),...,a(m-1)) is the representation
|
|
||||||
of the integer "alpha_to[i]" with a(0) being the LSB and a(m-1) the MSB. Thus for
|
|
||||||
example the polynomial representation of @^5 would be given by the binary
|
|
||||||
representation of the integer "alpha_to[5]".
|
|
||||||
Similarily, index_of[] can be used as follows:
|
|
||||||
As above, let @ represent the primitive element of GF(2^m) that is
|
|
||||||
the root of the primitive polynomial p(x). In order to find the power
|
|
||||||
of @ (alpha) that has the polynomial representation
|
|
||||||
a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1)
|
|
||||||
we consider the integer "i" whose binary representation with a(0) being LSB
|
|
||||||
and a(m-1) MSB is (a(0),a(1),...,a(m-1)) and locate the entry
|
|
||||||
"index_of[i]". Now, @^index_of[i] is that element whose polynomial
|
|
||||||
representation is (a(0),a(1),a(2),...,a(m-1)).
|
|
||||||
NOTE:
|
|
||||||
The element alpha_to[2^m-1] = 0 always signifying that the
|
|
||||||
representation of "@^infinity" = 0 is (0,0,0,...,0).
|
|
||||||
Similarily, the element index_of[0] = A0 always signifying
|
|
||||||
that the power of alpha which has the polynomial representation
|
|
||||||
(0,0,...,0) is "infinity".
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void
|
|
||||||
generate_gf(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1])
|
|
||||||
{
|
|
||||||
register int i, mask;
|
|
||||||
|
|
||||||
mask = 1;
|
|
||||||
Alpha_to[MM] = 0;
|
|
||||||
for (i = 0; i < MM; i++) {
|
|
||||||
Alpha_to[i] = mask;
|
|
||||||
Index_of[Alpha_to[i]] = i;
|
|
||||||
/* If Pp[i] == 1 then, term @^i occurs in poly-repr of @^MM */
|
|
||||||
if (Pp[i] != 0)
|
|
||||||
Alpha_to[MM] ^= mask; /* Bit-wise EXOR operation */
|
|
||||||
mask <<= 1; /* single left-shift */
|
|
||||||
}
|
|
||||||
Index_of[Alpha_to[MM]] = MM;
|
|
||||||
/*
|
|
||||||
* Have obtained poly-repr of @^MM. Poly-repr of @^(i+1) is given by
|
|
||||||
* poly-repr of @^i shifted left one-bit and accounting for any @^MM
|
|
||||||
* term that may occur when poly-repr of @^i is shifted.
|
|
||||||
*/
|
|
||||||
mask >>= 1;
|
|
||||||
for (i = MM + 1; i < NN; i++) {
|
|
||||||
if (Alpha_to[i - 1] >= mask)
|
|
||||||
Alpha_to[i] = Alpha_to[MM] ^ ((Alpha_to[i - 1] ^ mask) << 1);
|
|
||||||
else
|
|
||||||
Alpha_to[i] = Alpha_to[i - 1] << 1;
|
|
||||||
Index_of[Alpha_to[i]] = i;
|
|
||||||
}
|
|
||||||
Index_of[0] = A0;
|
|
||||||
Alpha_to[NN] = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Performs ERRORS+ERASURES decoding of RS codes. bb[] is the content
|
|
||||||
* of the feedback shift register after having processed the data and
|
|
||||||
* the ECC.
|
|
||||||
*
|
|
||||||
* Return number of symbols corrected, or -1 if codeword is illegal
|
|
||||||
* or uncorrectable. If eras_pos is non-null, the detected error locations
|
|
||||||
* are written back. NOTE! This array must be at least NN-KK elements long.
|
|
||||||
* The corrected data are written in eras_val[]. They must be xor with the data
|
|
||||||
* to retrieve the correct data : data[erase_pos[i]] ^= erase_val[i] .
|
|
||||||
*
|
|
||||||
* First "no_eras" erasures are declared by the calling program. Then, the
|
|
||||||
* maximum # of errors correctable is t_after_eras = floor((NN-KK-no_eras)/2).
|
|
||||||
* If the number of channel errors is not greater than "t_after_eras" the
|
|
||||||
* transmitted codeword will be recovered. Details of algorithm can be found
|
|
||||||
* in R. Blahut's "Theory ... of Error-Correcting Codes".
|
|
||||||
|
|
||||||
* Warning: the eras_pos[] array must not contain duplicate entries; decoder failure
|
|
||||||
* will result. The decoder *could* check for this condition, but it would involve
|
|
||||||
* extra time on every decoding operation.
|
|
||||||
* */
|
|
||||||
static int
|
|
||||||
eras_dec_rs(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1],
|
|
||||||
gf bb[NN - KK + 1], gf eras_val[NN-KK], int eras_pos[NN-KK],
|
|
||||||
int no_eras)
|
|
||||||
{
|
|
||||||
int deg_lambda, el, deg_omega;
|
|
||||||
int i, j, r,k;
|
|
||||||
gf u,q,tmp,num1,num2,den,discr_r;
|
|
||||||
gf lambda[NN-KK + 1], s[NN-KK + 1]; /* Err+Eras Locator poly
|
|
||||||
* and syndrome poly */
|
|
||||||
gf b[NN-KK + 1], t[NN-KK + 1], omega[NN-KK + 1];
|
|
||||||
gf root[NN-KK], reg[NN-KK + 1], loc[NN-KK];
|
|
||||||
int syn_error, count;
|
|
||||||
|
|
||||||
syn_error = 0;
|
|
||||||
for(i=0;i<NN-KK;i++)
|
|
||||||
syn_error |= bb[i];
|
|
||||||
|
|
||||||
if (!syn_error) {
|
|
||||||
/* if remainder is zero, data[] is a codeword and there are no
|
|
||||||
* errors to correct. So return data[] unmodified
|
|
||||||
*/
|
|
||||||
count = 0;
|
|
||||||
goto finish;
|
|
||||||
}
|
|
||||||
|
|
||||||
for(i=1;i<=NN-KK;i++){
|
|
||||||
s[i] = bb[0];
|
|
||||||
}
|
|
||||||
for(j=1;j<NN-KK;j++){
|
|
||||||
if(bb[j] == 0)
|
|
||||||
continue;
|
|
||||||
tmp = Index_of[bb[j]];
|
|
||||||
|
|
||||||
for(i=1;i<=NN-KK;i++)
|
|
||||||
s[i] ^= Alpha_to[modnn(tmp + (B0+i-1)*PRIM*j)];
|
|
||||||
}
|
|
||||||
|
|
||||||
/* undo the feedback register implicit multiplication and convert
|
|
||||||
syndromes to index form */
|
|
||||||
|
|
||||||
for(i=1;i<=NN-KK;i++) {
|
|
||||||
tmp = Index_of[s[i]];
|
|
||||||
if (tmp != A0)
|
|
||||||
tmp = modnn(tmp + 2 * KK * (B0+i-1)*PRIM);
|
|
||||||
s[i] = tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
CLEAR(&lambda[1],NN-KK);
|
|
||||||
lambda[0] = 1;
|
|
||||||
|
|
||||||
if (no_eras > 0) {
|
|
||||||
/* Init lambda to be the erasure locator polynomial */
|
|
||||||
lambda[1] = Alpha_to[modnn(PRIM * eras_pos[0])];
|
|
||||||
for (i = 1; i < no_eras; i++) {
|
|
||||||
u = modnn(PRIM*eras_pos[i]);
|
|
||||||
for (j = i+1; j > 0; j--) {
|
|
||||||
tmp = Index_of[lambda[j - 1]];
|
|
||||||
if(tmp != A0)
|
|
||||||
lambda[j] ^= Alpha_to[modnn(u + tmp)];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#ifdef ECC_DEBUG
|
|
||||||
/* Test code that verifies the erasure locator polynomial just constructed
|
|
||||||
Needed only for decoder debugging. */
|
|
||||||
|
|
||||||
/* find roots of the erasure location polynomial */
|
|
||||||
for(i=1;i<=no_eras;i++)
|
|
||||||
reg[i] = Index_of[lambda[i]];
|
|
||||||
count = 0;
|
|
||||||
for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) {
|
|
||||||
q = 1;
|
|
||||||
for (j = 1; j <= no_eras; j++)
|
|
||||||
if (reg[j] != A0) {
|
|
||||||
reg[j] = modnn(reg[j] + j);
|
|
||||||
q ^= Alpha_to[reg[j]];
|
|
||||||
}
|
|
||||||
if (q != 0)
|
|
||||||
continue;
|
|
||||||
/* store root and error location number indices */
|
|
||||||
root[count] = i;
|
|
||||||
loc[count] = k;
|
|
||||||
count++;
|
|
||||||
}
|
|
||||||
if (count != no_eras) {
|
|
||||||
printf("\n lambda(x) is WRONG\n");
|
|
||||||
count = -1;
|
|
||||||
goto finish;
|
|
||||||
}
|
|
||||||
#ifdef PSYCHO_DEBUG
|
|
||||||
printf("\n Erasure positions as determined by roots of Eras Loc Poly:\n");
|
|
||||||
for (i = 0; i < count; i++)
|
|
||||||
printf("%d ", loc[i]);
|
|
||||||
printf("\n");
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
for(i=0;i<NN-KK+1;i++)
|
|
||||||
b[i] = Index_of[lambda[i]];
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Begin Berlekamp-Massey algorithm to determine error+erasure
|
|
||||||
* locator polynomial
|
|
||||||
*/
|
|
||||||
r = no_eras;
|
|
||||||
el = no_eras;
|
|
||||||
while (++r <= NN-KK) { /* r is the step number */
|
|
||||||
/* Compute discrepancy at the r-th step in poly-form */
|
|
||||||
discr_r = 0;
|
|
||||||
for (i = 0; i < r; i++){
|
|
||||||
if ((lambda[i] != 0) && (s[r - i] != A0)) {
|
|
||||||
discr_r ^= Alpha_to[modnn(Index_of[lambda[i]] + s[r - i])];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
discr_r = Index_of[discr_r]; /* Index form */
|
|
||||||
if (discr_r == A0) {
|
|
||||||
/* 2 lines below: B(x) <-- x*B(x) */
|
|
||||||
COPYDOWN(&b[1],b,NN-KK);
|
|
||||||
b[0] = A0;
|
|
||||||
} else {
|
|
||||||
/* 7 lines below: T(x) <-- lambda(x) - discr_r*x*b(x) */
|
|
||||||
t[0] = lambda[0];
|
|
||||||
for (i = 0 ; i < NN-KK; i++) {
|
|
||||||
if(b[i] != A0)
|
|
||||||
t[i+1] = lambda[i+1] ^ Alpha_to[modnn(discr_r + b[i])];
|
|
||||||
else
|
|
||||||
t[i+1] = lambda[i+1];
|
|
||||||
}
|
|
||||||
if (2 * el <= r + no_eras - 1) {
|
|
||||||
el = r + no_eras - el;
|
|
||||||
/*
|
|
||||||
* 2 lines below: B(x) <-- inv(discr_r) *
|
|
||||||
* lambda(x)
|
|
||||||
*/
|
|
||||||
for (i = 0; i <= NN-KK; i++)
|
|
||||||
b[i] = (lambda[i] == 0) ? A0 : modnn(Index_of[lambda[i]] - discr_r + NN);
|
|
||||||
} else {
|
|
||||||
/* 2 lines below: B(x) <-- x*B(x) */
|
|
||||||
COPYDOWN(&b[1],b,NN-KK);
|
|
||||||
b[0] = A0;
|
|
||||||
}
|
|
||||||
COPY(lambda,t,NN-KK+1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Convert lambda to index form and compute deg(lambda(x)) */
|
|
||||||
deg_lambda = 0;
|
|
||||||
for(i=0;i<NN-KK+1;i++){
|
|
||||||
lambda[i] = Index_of[lambda[i]];
|
|
||||||
if(lambda[i] != A0)
|
|
||||||
deg_lambda = i;
|
|
||||||
}
|
|
||||||
/*
|
|
||||||
* Find roots of the error+erasure locator polynomial by Chien
|
|
||||||
* Search
|
|
||||||
*/
|
|
||||||
COPY(®[1],&lambda[1],NN-KK);
|
|
||||||
count = 0; /* Number of roots of lambda(x) */
|
|
||||||
for (i = 1,k=NN-Ldec; i <= NN; i++,k = modnn(NN+k-Ldec)) {
|
|
||||||
q = 1;
|
|
||||||
for (j = deg_lambda; j > 0; j--){
|
|
||||||
if (reg[j] != A0) {
|
|
||||||
reg[j] = modnn(reg[j] + j);
|
|
||||||
q ^= Alpha_to[reg[j]];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (q != 0)
|
|
||||||
continue;
|
|
||||||
/* store root (index-form) and error location number */
|
|
||||||
root[count] = i;
|
|
||||||
loc[count] = k;
|
|
||||||
/* If we've already found max possible roots,
|
|
||||||
* abort the search to save time
|
|
||||||
*/
|
|
||||||
if(++count == deg_lambda)
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
if (deg_lambda != count) {
|
|
||||||
/*
|
|
||||||
* deg(lambda) unequal to number of roots => uncorrectable
|
|
||||||
* error detected
|
|
||||||
*/
|
|
||||||
count = -1;
|
|
||||||
goto finish;
|
|
||||||
}
|
|
||||||
/*
|
|
||||||
* Compute err+eras evaluator poly omega(x) = s(x)*lambda(x) (modulo
|
|
||||||
* x**(NN-KK)). in index form. Also find deg(omega).
|
|
||||||
*/
|
|
||||||
deg_omega = 0;
|
|
||||||
for (i = 0; i < NN-KK;i++){
|
|
||||||
tmp = 0;
|
|
||||||
j = (deg_lambda < i) ? deg_lambda : i;
|
|
||||||
for(;j >= 0; j--){
|
|
||||||
if ((s[i + 1 - j] != A0) && (lambda[j] != A0))
|
|
||||||
tmp ^= Alpha_to[modnn(s[i + 1 - j] + lambda[j])];
|
|
||||||
}
|
|
||||||
if(tmp != 0)
|
|
||||||
deg_omega = i;
|
|
||||||
omega[i] = Index_of[tmp];
|
|
||||||
}
|
|
||||||
omega[NN-KK] = A0;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Compute error values in poly-form. num1 = omega(inv(X(l))), num2 =
|
|
||||||
* inv(X(l))**(B0-1) and den = lambda_pr(inv(X(l))) all in poly-form
|
|
||||||
*/
|
|
||||||
for (j = count-1; j >=0; j--) {
|
|
||||||
num1 = 0;
|
|
||||||
for (i = deg_omega; i >= 0; i--) {
|
|
||||||
if (omega[i] != A0)
|
|
||||||
num1 ^= Alpha_to[modnn(omega[i] + i * root[j])];
|
|
||||||
}
|
|
||||||
num2 = Alpha_to[modnn(root[j] * (B0 - 1) + NN)];
|
|
||||||
den = 0;
|
|
||||||
|
|
||||||
/* lambda[i+1] for i even is the formal derivative lambda_pr of lambda[i] */
|
|
||||||
for (i = min(deg_lambda,NN-KK-1) & ~1; i >= 0; i -=2) {
|
|
||||||
if(lambda[i+1] != A0)
|
|
||||||
den ^= Alpha_to[modnn(lambda[i+1] + i * root[j])];
|
|
||||||
}
|
|
||||||
if (den == 0) {
|
|
||||||
#ifdef ECC_DEBUG
|
|
||||||
printf("\n ERROR: denominator = 0\n");
|
|
||||||
#endif
|
|
||||||
/* Convert to dual- basis */
|
|
||||||
count = -1;
|
|
||||||
goto finish;
|
|
||||||
}
|
|
||||||
/* Apply error to data */
|
|
||||||
if (num1 != 0) {
|
|
||||||
eras_val[j] = Alpha_to[modnn(Index_of[num1] + Index_of[num2] + NN - Index_of[den])];
|
|
||||||
} else {
|
|
||||||
eras_val[j] = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
finish:
|
|
||||||
for(i=0;i<count;i++)
|
|
||||||
eras_pos[i] = loc[i];
|
|
||||||
return count;
|
|
||||||
}
|
|
||||||
|
|
||||||
/***************************************************************************/
|
|
||||||
/* The DOC specific code begins here */
|
|
||||||
|
|
||||||
#define SECTOR_SIZE 512
|
|
||||||
/* The sector bytes are packed into NB_DATA MM bits words */
|
|
||||||
#define NB_DATA (((SECTOR_SIZE + 1) * 8 + 6) / MM)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Correct the errors in 'sector[]' by using 'ecc1[]' which is the
|
|
||||||
* content of the feedback shift register applyied to the sector and
|
|
||||||
* the ECC. Return the number of errors corrected (and correct them in
|
|
||||||
* sector), or -1 if error
|
|
||||||
*/
|
|
||||||
int doc_decode_ecc(unsigned char sector[SECTOR_SIZE], unsigned char ecc1[6])
|
|
||||||
{
|
|
||||||
int parity, i, nb_errors;
|
|
||||||
gf bb[NN - KK + 1];
|
|
||||||
gf error_val[NN-KK];
|
|
||||||
int error_pos[NN-KK], pos, bitpos, index, val;
|
|
||||||
dtype *Alpha_to, *Index_of;
|
|
||||||
|
|
||||||
/* init log and exp tables here to save memory. However, it is slower */
|
|
||||||
Alpha_to = malloc((NN + 1) * sizeof(dtype));
|
|
||||||
if (!Alpha_to)
|
|
||||||
return -1;
|
|
||||||
|
|
||||||
Index_of = malloc((NN + 1) * sizeof(dtype));
|
|
||||||
if (!Index_of) {
|
|
||||||
free(Alpha_to);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
generate_gf(Alpha_to, Index_of);
|
|
||||||
|
|
||||||
parity = ecc1[1];
|
|
||||||
|
|
||||||
bb[0] = (ecc1[4] & 0xff) | ((ecc1[5] & 0x03) << 8);
|
|
||||||
bb[1] = ((ecc1[5] & 0xfc) >> 2) | ((ecc1[2] & 0x0f) << 6);
|
|
||||||
bb[2] = ((ecc1[2] & 0xf0) >> 4) | ((ecc1[3] & 0x3f) << 4);
|
|
||||||
bb[3] = ((ecc1[3] & 0xc0) >> 6) | ((ecc1[0] & 0xff) << 2);
|
|
||||||
|
|
||||||
nb_errors = eras_dec_rs(Alpha_to, Index_of, bb,
|
|
||||||
error_val, error_pos, 0);
|
|
||||||
if (nb_errors <= 0)
|
|
||||||
goto the_end;
|
|
||||||
|
|
||||||
/* correct the errors */
|
|
||||||
for(i=0;i<nb_errors;i++) {
|
|
||||||
pos = error_pos[i];
|
|
||||||
if (pos >= NB_DATA && pos < KK) {
|
|
||||||
nb_errors = -1;
|
|
||||||
goto the_end;
|
|
||||||
}
|
|
||||||
if (pos < NB_DATA) {
|
|
||||||
/* extract bit position (MSB first) */
|
|
||||||
pos = 10 * (NB_DATA - 1 - pos) - 6;
|
|
||||||
/* now correct the following 10 bits. At most two bytes
|
|
||||||
can be modified since pos is even */
|
|
||||||
index = (pos >> 3) ^ 1;
|
|
||||||
bitpos = pos & 7;
|
|
||||||
if ((index >= 0 && index < SECTOR_SIZE) ||
|
|
||||||
index == (SECTOR_SIZE + 1)) {
|
|
||||||
val = error_val[i] >> (2 + bitpos);
|
|
||||||
parity ^= val;
|
|
||||||
if (index < SECTOR_SIZE)
|
|
||||||
sector[index] ^= val;
|
|
||||||
}
|
|
||||||
index = ((pos >> 3) + 1) ^ 1;
|
|
||||||
bitpos = (bitpos + 10) & 7;
|
|
||||||
if (bitpos == 0)
|
|
||||||
bitpos = 8;
|
|
||||||
if ((index >= 0 && index < SECTOR_SIZE) ||
|
|
||||||
index == (SECTOR_SIZE + 1)) {
|
|
||||||
val = error_val[i] << (8 - bitpos);
|
|
||||||
parity ^= val;
|
|
||||||
if (index < SECTOR_SIZE)
|
|
||||||
sector[index] ^= val;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* use parity to test extra errors */
|
|
||||||
if ((parity & 0xff) != 0)
|
|
||||||
nb_errors = -1;
|
|
||||||
|
|
||||||
the_end:
|
|
||||||
free(Alpha_to);
|
|
||||||
free(Index_of);
|
|
||||||
return nb_errors;
|
|
||||||
}
|
|
||||||
@ -57,10 +57,6 @@
|
|||||||
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
|
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
int nand_legacy_rw (struct nand_chip* nand, int cmd,
|
|
||||||
size_t start, size_t len,
|
|
||||||
size_t * retlen, u_char * buf);
|
|
||||||
|
|
||||||
/* references to names in env_common.c */
|
/* references to names in env_common.c */
|
||||||
extern uchar default_environment[];
|
extern uchar default_environment[];
|
||||||
extern int default_environment_size;
|
extern int default_environment_size;
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* (C) Copyright 2005-2007 Samsung Electronics
|
* (C) Copyright 2005-2009 Samsung Electronics
|
||||||
* Kyungmin Park <kyungmin.park@samsung.com>
|
* Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
*
|
*
|
||||||
* See file CREDITS for list of people who contributed to this
|
* See file CREDITS for list of people who contributed to this
|
||||||
@ -37,15 +37,16 @@ extern struct onenand_chip onenand_chip;
|
|||||||
/* References to names in env_common.c */
|
/* References to names in env_common.c */
|
||||||
extern uchar default_environment[];
|
extern uchar default_environment[];
|
||||||
|
|
||||||
#define ONENAND_ENV_SIZE(mtd) (mtd.writesize - ENV_HEADER_SIZE)
|
|
||||||
|
|
||||||
char *env_name_spec = "OneNAND";
|
char *env_name_spec = "OneNAND";
|
||||||
|
|
||||||
|
#define ONENAND_MAX_ENV_SIZE 4096
|
||||||
|
#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
|
||||||
|
|
||||||
#ifdef ENV_IS_EMBEDDED
|
#ifdef ENV_IS_EMBEDDED
|
||||||
extern uchar environment[];
|
extern uchar environment[];
|
||||||
env_t *env_ptr = (env_t *) (&environment[0]);
|
env_t *env_ptr = (env_t *) (&environment[0]);
|
||||||
#else /* ! ENV_IS_EMBEDDED */
|
#else /* ! ENV_IS_EMBEDDED */
|
||||||
static unsigned char onenand_env[MAX_ONENAND_PAGESIZE];
|
static unsigned char onenand_env[ONENAND_MAX_ENV_SIZE];
|
||||||
env_t *env_ptr = (env_t *) onenand_env;
|
env_t *env_ptr = (env_t *) onenand_env;
|
||||||
#endif /* ENV_IS_EMBEDDED */
|
#endif /* ENV_IS_EMBEDDED */
|
||||||
|
|
||||||
@ -58,6 +59,7 @@ uchar env_get_char_spec(int index)
|
|||||||
|
|
||||||
void env_relocate_spec(void)
|
void env_relocate_spec(void)
|
||||||
{
|
{
|
||||||
|
struct mtd_info *mtd = &onenand_mtd;
|
||||||
loff_t env_addr;
|
loff_t env_addr;
|
||||||
int use_default = 0;
|
int use_default = 0;
|
||||||
size_t retlen;
|
size_t retlen;
|
||||||
@ -65,22 +67,21 @@ void env_relocate_spec(void)
|
|||||||
env_addr = CONFIG_ENV_ADDR;
|
env_addr = CONFIG_ENV_ADDR;
|
||||||
|
|
||||||
/* Check OneNAND exist */
|
/* Check OneNAND exist */
|
||||||
if (onenand_mtd.writesize)
|
if (mtd->writesize)
|
||||||
/* Ignore read fail */
|
/* Ignore read fail */
|
||||||
onenand_read(&onenand_mtd, env_addr, onenand_mtd.writesize,
|
mtd->read(mtd, env_addr, ONENAND_MAX_ENV_SIZE,
|
||||||
&retlen, (u_char *) env_ptr);
|
&retlen, (u_char *) env_ptr);
|
||||||
else
|
else
|
||||||
onenand_mtd.writesize = MAX_ONENAND_PAGESIZE;
|
mtd->writesize = MAX_ONENAND_PAGESIZE;
|
||||||
|
|
||||||
if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) !=
|
if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd)) != env_ptr->crc)
|
||||||
env_ptr->crc)
|
|
||||||
use_default = 1;
|
use_default = 1;
|
||||||
|
|
||||||
if (use_default) {
|
if (use_default) {
|
||||||
memcpy(env_ptr->data, default_environment,
|
memcpy(env_ptr->data, default_environment,
|
||||||
ONENAND_ENV_SIZE(onenand_mtd));
|
ONENAND_ENV_SIZE(mtd));
|
||||||
env_ptr->crc =
|
env_ptr->crc =
|
||||||
crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd));
|
crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd));
|
||||||
}
|
}
|
||||||
|
|
||||||
gd->env_addr = (ulong) & env_ptr->data;
|
gd->env_addr = (ulong) & env_ptr->data;
|
||||||
@ -89,7 +90,8 @@ void env_relocate_spec(void)
|
|||||||
|
|
||||||
int saveenv(void)
|
int saveenv(void)
|
||||||
{
|
{
|
||||||
unsigned long env_addr = CONFIG_ENV_ADDR;
|
struct mtd_info *mtd = &onenand_mtd;
|
||||||
|
loff_t env_addr = CONFIG_ENV_ADDR;
|
||||||
struct erase_info instr = {
|
struct erase_info instr = {
|
||||||
.callback = NULL,
|
.callback = NULL,
|
||||||
};
|
};
|
||||||
@ -97,17 +99,16 @@ int saveenv(void)
|
|||||||
|
|
||||||
instr.len = CONFIG_ENV_SIZE;
|
instr.len = CONFIG_ENV_SIZE;
|
||||||
instr.addr = env_addr;
|
instr.addr = env_addr;
|
||||||
instr.mtd = &onenand_mtd;
|
instr.mtd = mtd;
|
||||||
if (onenand_erase(&onenand_mtd, &instr)) {
|
if (mtd->erase(mtd, &instr)) {
|
||||||
printf("OneNAND: erase failed at 0x%08lx\n", env_addr);
|
printf("OneNAND: erase failed at 0x%08lx\n", env_addr);
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* update crc */
|
/* update crc */
|
||||||
env_ptr->crc =
|
env_ptr->crc = crc32(0, env_ptr->data, ONENAND_ENV_SIZE(mtd));
|
||||||
crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd));
|
|
||||||
|
|
||||||
if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.writesize, &retlen,
|
if (mtd->write(mtd, env_addr, ONENAND_MAX_ENV_SIZE, &retlen,
|
||||||
(u_char *) env_ptr)) {
|
(u_char *) env_ptr)) {
|
||||||
printf("OneNAND: write failed at 0x%llx\n", instr.addr);
|
printf("OneNAND: write failed at 0x%llx\n", instr.addr);
|
||||||
return 2;
|
return 2;
|
||||||
|
|||||||
@ -51,7 +51,6 @@ COBJS += fdt.o
|
|||||||
COBJS += i2c.o
|
COBJS += i2c.o
|
||||||
COBJS += interrupts.o
|
COBJS += interrupts.o
|
||||||
COBJS += iop480_uart.o
|
COBJS += iop480_uart.o
|
||||||
COBJS += ndfc.o
|
|
||||||
COBJS += sdram.o
|
COBJS += sdram.o
|
||||||
COBJS += speed.o
|
COBJS += speed.o
|
||||||
COBJS += tlb.o
|
COBJS += tlb.o
|
||||||
|
|||||||
@ -105,8 +105,7 @@ NOTE:
|
|||||||
=====
|
=====
|
||||||
|
|
||||||
The current NAND implementation is based on what is in recent
|
The current NAND implementation is based on what is in recent
|
||||||
Linux kernels. The old legacy implementation has been disabled,
|
Linux kernels. The old legacy implementation has been removed.
|
||||||
and will be removed soon.
|
|
||||||
|
|
||||||
If you have board code which used CONFIG_NAND_LEGACY, you'll need
|
If you have board code which used CONFIG_NAND_LEGACY, you'll need
|
||||||
to convert to the current NAND interface for it to continue to work.
|
to convert to the current NAND interface for it to continue to work.
|
||||||
|
|||||||
@ -56,11 +56,3 @@ Why: Over time, a couple of files have sneaked in into the U-Boot
|
|||||||
for an old and probably incomplete list of such files.
|
for an old and probably incomplete list of such files.
|
||||||
|
|
||||||
Who: Wolfgang Denk <wd@denx.de> and board maintainers
|
Who: Wolfgang Denk <wd@denx.de> and board maintainers
|
||||||
|
|
||||||
---------------------------
|
|
||||||
|
|
||||||
What: Legacy NAND code
|
|
||||||
When: April 2009
|
|
||||||
Why: Legacy NAND code is deprecated. Similar functionality exists in
|
|
||||||
more recent NAND code ported from the Linux kernel.
|
|
||||||
Who: Scott Wood <scottwood@freescale.com>
|
|
||||||
|
|||||||
@ -26,14 +26,12 @@ include $(TOPDIR)/config.mk
|
|||||||
LIB := $(obj)libnand.a
|
LIB := $(obj)libnand.a
|
||||||
|
|
||||||
ifdef CONFIG_CMD_NAND
|
ifdef CONFIG_CMD_NAND
|
||||||
ifndef CONFIG_NAND_LEGACY
|
|
||||||
COBJS-y += nand.o
|
COBJS-y += nand.o
|
||||||
COBJS-y += nand_base.o
|
COBJS-y += nand_base.o
|
||||||
COBJS-y += nand_bbt.o
|
COBJS-y += nand_bbt.o
|
||||||
COBJS-y += nand_ecc.o
|
COBJS-y += nand_ecc.o
|
||||||
COBJS-y += nand_ids.o
|
COBJS-y += nand_ids.o
|
||||||
COBJS-y += nand_util.o
|
COBJS-y += nand_util.o
|
||||||
endif
|
|
||||||
|
|
||||||
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
|
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
|
||||||
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
|
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
|
||||||
@ -42,6 +40,7 @@ COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
|
|||||||
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
|
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
|
||||||
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
|
COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
|
||||||
COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
|
COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
|
||||||
|
COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
|
||||||
COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
|
COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
|
||||||
COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
|
COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
|
||||||
COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
|
COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
|
||||||
|
|||||||
@ -182,7 +182,7 @@ static void nand_flash_init(void)
|
|||||||
* knowledge of the clocks and what devices are hooked up ... and
|
* knowledge of the clocks and what devices are hooked up ... and
|
||||||
* don't even do that unless no UBL handled it.
|
* don't even do that unless no UBL handled it.
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_SOC_DM6446
|
#ifdef CONFIG_SOC_DM644X
|
||||||
u_int32_t acfg1 = 0x3ffffffc;
|
u_int32_t acfg1 = 0x3ffffffc;
|
||||||
|
|
||||||
/*------------------------------------------------------------------*
|
/*------------------------------------------------------------------*
|
||||||
|
|||||||
@ -19,8 +19,6 @@
|
|||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
|
||||||
#if !defined(CONFIG_NAND_LEGACY)
|
|
||||||
|
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <linux/sched.h>
|
#include <linux/sched.h>
|
||||||
@ -1779,4 +1777,3 @@ module_exit(cleanup_nanddoc);
|
|||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
|
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
|
||||||
MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
|
MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n");
|
||||||
#endif
|
|
||||||
|
|||||||
@ -567,10 +567,10 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
|
|||||||
|
|
||||||
if (len_incl_bad == *length) {
|
if (len_incl_bad == *length) {
|
||||||
rval = nand_read (nand, offset, length, buffer);
|
rval = nand_read (nand, offset, length, buffer);
|
||||||
if (rval != 0)
|
if (!rval || rval == -EUCLEAN)
|
||||||
printf ("NAND read from offset %llx failed %d\n",
|
return 0;
|
||||||
offset, rval);
|
printf ("NAND read from offset %llx failed %d\n",
|
||||||
|
offset, rval);
|
||||||
return rval;
|
return rval;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -591,7 +591,7 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
|
|||||||
read_length = nand->erasesize - block_offset;
|
read_length = nand->erasesize - block_offset;
|
||||||
|
|
||||||
rval = nand_read (nand, offset, &read_length, p_buffer);
|
rval = nand_read (nand, offset, &read_length, p_buffer);
|
||||||
if (rval != 0) {
|
if (rval && rval != -EUCLEAN) {
|
||||||
printf ("NAND read from offset %llx failed %d\n",
|
printf ("NAND read from offset %llx failed %d\n",
|
||||||
offset, rval);
|
offset, rval);
|
||||||
*length -= left_to_read;
|
*length -= left_to_read;
|
||||||
|
|||||||
@ -30,10 +30,6 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
|
|
||||||
defined(CONFIG_NAND_NDFC)
|
|
||||||
|
|
||||||
#include <nand.h>
|
#include <nand.h>
|
||||||
#include <linux/mtd/ndfc.h>
|
#include <linux/mtd/ndfc.h>
|
||||||
#include <linux/mtd/nand_ecc.h>
|
#include <linux/mtd/nand_ecc.h>
|
||||||
@ -219,5 +215,3 @@ int board_nand_init(struct nand_chip *nand)
|
|||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
|
||||||
@ -1,48 +0,0 @@
|
|||||||
#
|
|
||||||
# (C) Copyright 2006
|
|
||||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
||||||
#
|
|
||||||
# See file CREDITS for list of people who contributed to this
|
|
||||||
# project.
|
|
||||||
#
|
|
||||||
# This program is free software; you can redistribute it and/or
|
|
||||||
# modify it under the terms of the GNU General Public License as
|
|
||||||
# published by the Free Software Foundation; either version 2 of
|
|
||||||
# the License, or (at your option) any later version.
|
|
||||||
#
|
|
||||||
# This program is distributed in the hope that it will be useful,
|
|
||||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
# GNU General Public License for more details.
|
|
||||||
#
|
|
||||||
# You should have received a copy of the GNU General Public License
|
|
||||||
# along with this program; if not, write to the Free Software
|
|
||||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
# MA 02111-1307 USA
|
|
||||||
#
|
|
||||||
|
|
||||||
include $(TOPDIR)/config.mk
|
|
||||||
|
|
||||||
LIB := $(obj)libnand_legacy.a
|
|
||||||
|
|
||||||
ifdef CONFIG_CMD_NAND
|
|
||||||
COBJS-$(CONFIG_NAND_LEGACY) := nand_legacy.o
|
|
||||||
endif
|
|
||||||
|
|
||||||
COBJS := $(COBJS-y)
|
|
||||||
SRCS := $(COBJS:.o=.c)
|
|
||||||
OBJS := $(addprefix $(obj),$(COBJS))
|
|
||||||
|
|
||||||
all: $(LIB)
|
|
||||||
|
|
||||||
$(LIB): $(obj).depend $(OBJS)
|
|
||||||
$(AR) $(ARFLAGS) $@ $(OBJS)
|
|
||||||
|
|
||||||
#########################################################################
|
|
||||||
|
|
||||||
# defines $(obj).depend target
|
|
||||||
include $(SRCTREE)/rules.mk
|
|
||||||
|
|
||||||
sinclude $(obj).depend
|
|
||||||
|
|
||||||
#########################################################################
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -146,11 +146,7 @@ static struct part_info *current_part;
|
|||||||
|
|
||||||
#if (defined(CONFIG_JFFS2_NAND) && \
|
#if (defined(CONFIG_JFFS2_NAND) && \
|
||||||
defined(CONFIG_CMD_NAND) )
|
defined(CONFIG_CMD_NAND) )
|
||||||
#if defined(CONFIG_NAND_LEGACY)
|
|
||||||
#include <linux/mtd/nand_legacy.h>
|
|
||||||
#else
|
|
||||||
#include <nand.h>
|
#include <nand.h>
|
||||||
#endif
|
|
||||||
/*
|
/*
|
||||||
* Support for jffs2 on top of NAND-flash
|
* Support for jffs2 on top of NAND-flash
|
||||||
*
|
*
|
||||||
@ -161,12 +157,6 @@ static struct part_info *current_part;
|
|||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#if defined(CONFIG_NAND_LEGACY)
|
|
||||||
/* this one defined in nand_legacy.c */
|
|
||||||
int read_jffs2_nand(size_t start, size_t len,
|
|
||||||
size_t * retlen, u_char * buf, int nanddev);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define NAND_PAGE_SIZE 512
|
#define NAND_PAGE_SIZE 512
|
||||||
#define NAND_PAGE_SHIFT 9
|
#define NAND_PAGE_SHIFT 9
|
||||||
#define NAND_PAGE_MASK (~(NAND_PAGE_SIZE-1))
|
#define NAND_PAGE_MASK (~(NAND_PAGE_SIZE-1))
|
||||||
@ -201,15 +191,6 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_NAND_LEGACY)
|
|
||||||
if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
|
|
||||||
&retlen, nand_cache, id->num) < 0 ||
|
|
||||||
retlen != NAND_CACHE_SIZE) {
|
|
||||||
printf("read_nand_cached: error reading nand off %#x size %d bytes\n",
|
|
||||||
nand_cache_off, NAND_CACHE_SIZE);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
retlen = NAND_CACHE_SIZE;
|
retlen = NAND_CACHE_SIZE;
|
||||||
if (nand_read(&nand_info[id->num], nand_cache_off,
|
if (nand_read(&nand_info[id->num], nand_cache_off,
|
||||||
&retlen, nand_cache) != 0 ||
|
&retlen, nand_cache) != 0 ||
|
||||||
@ -218,7 +199,6 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
|
|||||||
nand_cache_off, NAND_CACHE_SIZE);
|
nand_cache_off, NAND_CACHE_SIZE);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read);
|
cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read);
|
||||||
if (cpy_bytes > size - bytes_read)
|
if (cpy_bytes > size - bytes_read)
|
||||||
|
|||||||
@ -1,7 +1,5 @@
|
|||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
|
||||||
#if !defined(CONFIG_NAND_LEGACY)
|
|
||||||
|
|
||||||
#include <malloc.h>
|
#include <malloc.h>
|
||||||
#include <linux/stat.h>
|
#include <linux/stat.h>
|
||||||
#include <linux/time.h>
|
#include <linux/time.h>
|
||||||
@ -1034,5 +1032,3 @@ jffs2_1pass_info(struct part_info * part)
|
|||||||
}
|
}
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -81,13 +81,9 @@
|
|||||||
#include <config_cmd_default.h>
|
#include <config_cmd_default.h>
|
||||||
|
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_ELF
|
#define CONFIG_CMD_ELF
|
||||||
|
|
||||||
|
|
||||||
/* CONFIG_CMD_DOC required legacy NAND support */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
#define CONFIG_PCI 1
|
#define CONFIG_PCI 1
|
||||||
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
||||||
|
|||||||
@ -209,16 +209,8 @@
|
|||||||
|
|
||||||
/* For CATcenter there is only NAND on the module */
|
/* For CATcenter there is only NAND on the module */
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define NAND_NO_RB
|
#define NAND_NO_RB
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
|
#define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */
|
||||||
#define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
|
#define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
|
||||||
#define CONFIG_SYS_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
|
#define CONFIG_SYS_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
|
||||||
|
|||||||
@ -145,15 +145,6 @@
|
|||||||
|
|
||||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
* Miscellaneous configuration options
|
* Miscellaneous configuration options
|
||||||
*/
|
*/
|
||||||
@ -179,7 +170,6 @@
|
|||||||
#define CONFIG_CMD_BEDBUG
|
#define CONFIG_CMD_BEDBUG
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_I2C
|
#define CONFIG_CMD_I2C
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
|
|||||||
@ -182,7 +182,6 @@
|
|||||||
|
|
||||||
#define CONFIG_CMD_BEDBUG
|
#define CONFIG_CMD_BEDBUG
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_I2C
|
#define CONFIG_CMD_I2C
|
||||||
|
|
||||||
@ -190,9 +189,6 @@
|
|||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -196,32 +196,12 @@
|
|||||||
*-----------------------------------------------------------------------
|
*-----------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
|
#define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
|
||||||
#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
|
#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
|
||||||
#define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
|
#define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
|
||||||
#define CONFIG_SYS_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
|
#define CONFIG_SYS_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
|
||||||
|
|
||||||
#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);} while(0)
|
|
||||||
#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CE);} while(0)
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);} while(0)
|
|
||||||
#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_ALE);} while(0)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);} while(0)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CLE);} while(0)
|
|
||||||
#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CONFIG_SYS_NAND_RDY))
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
|
|
||||||
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
|
|||||||
@ -244,10 +244,6 @@
|
|||||||
#define CONFIG_CMD_MII
|
#define CONFIG_CMD_MII
|
||||||
#define CONFIG_CMD_BEDBUG
|
#define CONFIG_CMD_BEDBUG
|
||||||
|
|
||||||
#if !defined(CONFIG_SC)
|
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_POST
|
#ifdef CONFIG_POST
|
||||||
#define CONFIG_CMD_DIAG
|
#define CONFIG_CMD_DIAG
|
||||||
#endif
|
#endif
|
||||||
@ -279,9 +275,6 @@
|
|||||||
#define CONFIG_FPGA_VIRTEX2
|
#define CONFIG_FPGA_VIRTEX2
|
||||||
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
|
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Verbose help from command monitor.
|
* Verbose help from command monitor.
|
||||||
*/
|
*/
|
||||||
@ -737,16 +730,6 @@
|
|||||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||||
|
|
||||||
/*
|
|
||||||
* Disk On Chip (millenium) configuration
|
|
||||||
*/
|
|
||||||
#if !defined(CONFIG_SC)
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1
|
|
||||||
#undef CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
#undef CONFIG_SYS_DOC_PASSIVE_PROBE
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* FEC interrupt assignment
|
* FEC interrupt assignment
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -84,12 +84,9 @@
|
|||||||
|
|
||||||
#if !defined(CONFIG_MIP405T)
|
#if !defined(CONFIG_MIP405T)
|
||||||
#define CONFIG_CMD_USB
|
#define CONFIG_CMD_USB
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_SYS_HUSH_PARSER
|
#define CONFIG_SYS_HUSH_PARSER
|
||||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||||
/**************************************************************
|
/**************************************************************
|
||||||
@ -383,13 +380,6 @@
|
|||||||
#define CONFIG_MAC_PARTITION
|
#define CONFIG_MAC_PARTITION
|
||||||
#define CONFIG_ISO_PARTITION /* Experimental */
|
#define CONFIG_ISO_PARTITION /* Experimental */
|
||||||
|
|
||||||
/************************************************************
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
************************************************************/
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
#define CONFIG_SYS_DOC_SHORT_TIMEOUT
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
/************************************************************
|
/************************************************************
|
||||||
* Keyboard support
|
* Keyboard support
|
||||||
************************************************************/
|
************************************************************/
|
||||||
|
|||||||
@ -497,95 +497,9 @@
|
|||||||
#define DSP_BASE 0xF1000000
|
#define DSP_BASE 0xF1000000
|
||||||
#define NAND_BASE 0xF1010000
|
#define NAND_BASE 0xF1010000
|
||||||
|
|
||||||
/****************************************************************/
|
|
||||||
|
|
||||||
/* NAND */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_MTD_NAND_UNSAFE
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#if CONFIG_NETPHONE_VERSION == 1
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
int _tries = 0; \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
|
|
||||||
if (++_tries > 100000) \
|
|
||||||
break; \
|
|
||||||
} while (0)
|
|
||||||
#elif CONFIG_NETPHONE_VERSION == 2
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
int _tries = 0; \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
|
|
||||||
if (++_tries > 100000) \
|
|
||||||
break; \
|
|
||||||
} while (0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define READ_NAND(adr) \
|
|
||||||
((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
||||||
#define CONFIG_SYS_DIRECT_NAND_TFTP
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|||||||
@ -616,105 +616,6 @@
|
|||||||
#define ER_BASE 0xF1020000
|
#define ER_BASE 0xF1020000
|
||||||
#define DUMMY_BASE 0xF1FF0000
|
#define DUMMY_BASE 0xF1FF0000
|
||||||
|
|
||||||
/****************************************************************/
|
|
||||||
|
|
||||||
/* NAND */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_MTD_NAND_UNSAFE
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
/* #define NAND_NO_RB */
|
|
||||||
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
/* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 5)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 5)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 3)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 3)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 4)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 4)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#ifndef NAND_NO_RB
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 13))) == 0) { \
|
|
||||||
WATCHDOG_RESET(); \
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
#else
|
|
||||||
#define NAND_WAIT_READY(nand) udelay(12)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define READ_NAND(adr) \
|
|
||||||
((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
|
|
||||||
|
|
||||||
#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
|
|
||||||
#define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* JFFS2 partitions
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/* No command line, one static partition, whole device */
|
|
||||||
#undef CONFIG_CMD_MTDPARTS
|
|
||||||
#define CONFIG_JFFS2_DEV "nand0"
|
|
||||||
#define CONFIG_JFFS2_PART_SIZE 0x00100000
|
|
||||||
#define CONFIG_JFFS2_PART_OFFSET 0x00200000
|
|
||||||
|
|
||||||
/* mtdparts command line support */
|
|
||||||
/* Note: fake mtd_id used, no linux mtd map file */
|
|
||||||
/*
|
|
||||||
#define CONFIG_CMD_MTDPARTS
|
|
||||||
#define MTDIDS_DEFAULT "nand0=netta-nand"
|
|
||||||
#define MTDPARTS_DEFAULT "mtdparts=netta-nand:1m@2m(jffs2)"
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
||||||
|
|||||||
@ -498,95 +498,9 @@
|
|||||||
#define DSP_BASE 0xF1000000
|
#define DSP_BASE 0xF1000000
|
||||||
#define NAND_BASE 0xF1010000
|
#define NAND_BASE 0xF1010000
|
||||||
|
|
||||||
/****************************************************************/
|
|
||||||
|
|
||||||
/* NAND */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_MTD_NAND_UNSAFE
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#if CONFIG_NETTA2_VERSION == 1
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
int _tries = 0; \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \
|
|
||||||
if (++_tries > 100000) \
|
|
||||||
break; \
|
|
||||||
} while (0)
|
|
||||||
#elif CONFIG_NETTA2_VERSION == 2
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
int _tries = 0; \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \
|
|
||||||
if (++_tries > 100000) \
|
|
||||||
break; \
|
|
||||||
} while (0)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define READ_NAND(adr) \
|
|
||||||
((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
||||||
#define CONFIG_SYS_DIRECT_NAND_TFTP
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|||||||
@ -393,80 +393,6 @@
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
|
|
||||||
|
|
||||||
/* NAND */
|
|
||||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \
|
|
||||||
; \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define READ_NAND(adr) \
|
|
||||||
((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|||||||
@ -75,7 +75,6 @@
|
|||||||
#define CONFIG_CMD_BSP
|
#define CONFIG_CMD_BSP
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_ELF
|
#define CONFIG_CMD_ELF
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
@ -84,8 +83,6 @@
|
|||||||
#define CONFIG_PCI 1
|
#define CONFIG_PCI 1
|
||||||
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
@ -250,15 +247,6 @@
|
|||||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
RTC m48t59
|
RTC m48t59
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -75,7 +75,6 @@
|
|||||||
#define CONFIG_CMD_BSP
|
#define CONFIG_CMD_BSP
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_ELF
|
#define CONFIG_CMD_ELF
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
@ -86,8 +85,6 @@
|
|||||||
#define CONFIG_PCI 1
|
#define CONFIG_PCI 1
|
||||||
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
@ -252,15 +249,6 @@
|
|||||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
RTC m48t59
|
RTC m48t59
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -71,14 +71,10 @@
|
|||||||
#define CONFIG_CMD_USB
|
#define CONFIG_CMD_USB
|
||||||
#define CONFIG_CMD_MII
|
#define CONFIG_CMD_MII
|
||||||
#define CONFIG_CMD_SDRAM
|
#define CONFIG_CMD_SDRAM
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_PING
|
#define CONFIG_CMD_PING
|
||||||
#define CONFIG_CMD_SAVES
|
#define CONFIG_CMD_SAVES
|
||||||
#define CONFIG_CMD_BSP
|
#define CONFIG_CMD_BSP
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_SYS_HUSH_PARSER
|
#define CONFIG_SYS_HUSH_PARSER
|
||||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||||
/**************************************************************
|
/**************************************************************
|
||||||
|
|||||||
@ -86,12 +86,6 @@
|
|||||||
#define CONFIG_USB_STORAGE
|
#define CONFIG_USB_STORAGE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(CONFIG_BOOT_ROM)
|
|
||||||
/* DoC requires legacy NAND for now */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* BOOTP options
|
* BOOTP options
|
||||||
*/
|
*/
|
||||||
@ -117,10 +111,6 @@
|
|||||||
#define CONFIG_CMD_SNTP
|
#define CONFIG_CMD_SNTP
|
||||||
#define CONFIG_CMD_USB
|
#define CONFIG_CMD_USB
|
||||||
|
|
||||||
#if !defined(CONFIG_BOOT_ROM)
|
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_MPC5200)
|
#if defined(CONFIG_MPC5200)
|
||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
#endif
|
#endif
|
||||||
@ -186,15 +176,6 @@
|
|||||||
#define CONFIG_RTC_PCF8563
|
#define CONFIG_RTC_PCF8563
|
||||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
|
||||||
|
|
||||||
/*
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SHORT_TIMEOUT
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
#define CONFIG_SYS_DOC_BASE 0xE0000000
|
#define CONFIG_SYS_DOC_BASE 0xE0000000
|
||||||
#define CONFIG_SYS_DOC_SIZE 0x00100000
|
#define CONFIG_SYS_DOC_SIZE 0x00100000
|
||||||
|
|
||||||
|
|||||||
@ -169,7 +169,6 @@
|
|||||||
#define CONFIG_CMD_BEDBUG
|
#define CONFIG_CMD_BEDBUG
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_I2C
|
#define CONFIG_CMD_I2C
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
@ -179,19 +178,6 @@
|
|||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SHORT_TIMEOUT
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -169,7 +169,6 @@
|
|||||||
#define CONFIG_CMD_BEDBUG
|
#define CONFIG_CMD_BEDBUG
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_I2C
|
#define CONFIG_CMD_I2C
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
@ -179,18 +178,6 @@
|
|||||||
#define CONFIG_CMD_PCI
|
#define CONFIG_CMD_PCI
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
*/
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SHORT_TIMEOUT
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -312,32 +312,6 @@
|
|||||||
} \
|
} \
|
||||||
} while(0)
|
} while(0)
|
||||||
|
|
||||||
#if 0
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define NAND_NO_RB
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#ifdef NAND_NO_RB
|
|
||||||
/* constant delay (see also tR in the datasheet) */
|
|
||||||
#define NAND_WAIT_READY(nand) do { \
|
|
||||||
udelay(12); \
|
|
||||||
} while (0)
|
|
||||||
#else
|
|
||||||
/* use the R/B pin */
|
|
||||||
/* TBD */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
|
|
||||||
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
|
|
||||||
#endif
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
* PCI stuff
|
* PCI stuff
|
||||||
*-----------------------------------------------------------------------
|
*-----------------------------------------------------------------------
|
||||||
|
|||||||
@ -114,7 +114,6 @@
|
|||||||
#define CONFIG_CMD_CDP
|
#define CONFIG_CMD_CDP
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DIAG
|
#define CONFIG_CMD_DIAG
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_ELF
|
#define CONFIG_CMD_ELF
|
||||||
#define CONFIG_CMD_FAT
|
#define CONFIG_CMD_FAT
|
||||||
@ -329,14 +328,6 @@
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/************************************************************
|
|
||||||
* Disk-On-Chip configuration
|
|
||||||
************************************************************/
|
|
||||||
#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
|
|
||||||
#define CONFIG_SYS_DOC_SHORT_TIMEOUT
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_2000
|
|
||||||
#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
/*-----------------------------------------------------------------------
|
||||||
*
|
*
|
||||||
*-----------------------------------------------------------------------
|
*-----------------------------------------------------------------------
|
||||||
|
|||||||
@ -163,75 +163,8 @@
|
|||||||
|
|
||||||
#define CONFIG_CMD_EEPROM
|
#define CONFIG_CMD_EEPROM
|
||||||
#define CONFIG_CMD_JFFS2
|
#define CONFIG_CMD_JFFS2
|
||||||
#define CONFIG_CMD_NAND
|
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS
|
|
||||||
|
|
||||||
/*
|
|
||||||
* JFFS2 partitions
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/* No command line, one static partition */
|
|
||||||
#undef CONFIG_CMD_MTDPARTS
|
|
||||||
|
|
||||||
/*
|
|
||||||
#define CONFIG_JFFS2_DEV "nor0"
|
|
||||||
#define CONFIG_JFFS2_PART_SIZE 0x00780000
|
|
||||||
#define CONFIG_JFFS2_PART_OFFSET 0x00080000
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define CONFIG_JFFS2_DEV "nand0"
|
|
||||||
#define CONFIG_JFFS2_PART_SIZE 0x00200000
|
|
||||||
#define CONFIG_JFFS2_PART_OFFSET 0x00000000
|
|
||||||
|
|
||||||
/* mtdparts command line support */
|
|
||||||
/* Note: fake mtd_id used, no linux mtd map file */
|
|
||||||
/*
|
|
||||||
#define CONFIG_CMD_MTDPARTS
|
|
||||||
#define MTDIDS_DEFAULT "nor0=sixnet-0,nand0=sixnet-nand"
|
|
||||||
#define MTDPARTS_DEFAULT "mtdparts=sixnet-0:7680k@512k();sixnet-nand:2m(jffs2-nand)"
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* NAND flash support */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
/* DFBUSY is available on Port C, bit 12; 0 if busy */
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
while (!(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x0008));
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND((d), (adr))
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND((d), (adr))
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { (*(volatile uint8_t *)(adr) = (uint8_t)(d)); } while (0)
|
|
||||||
#define READ_NAND(adr) (*(volatile uint8_t *)(adr))
|
|
||||||
#define CLE_LO 0x01 /* 0 selects CLE mode (CLE high) */
|
|
||||||
#define ALE_LO 0x02 /* 0 selects ALE mode (ALE high) */
|
|
||||||
#define CE_LO 0x04 /* 1 selects chip (CE low) */
|
|
||||||
#define nand_setcr(cr, val) do {*(volatile uint8_t*)(cr) = (val);} while (0)
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
nand_setcr((nand)->IO_ADDR + 1, ALE_LO | CLE_LO)
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
nand_setcr((nand)->IO_ADDR + 1, CE_LO | ALE_LO | CLE_LO)
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO)
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
nand_setcr((nandptr) + 1, CE_LO | CLE_LO)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
nand_setcr((nandptr) + 1, CE_LO | ALE_LO)
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -351,8 +351,6 @@
|
|||||||
/* NAND FLASH */
|
/* NAND FLASH */
|
||||||
#ifdef CONFIG_NAND
|
#ifdef CONFIG_NAND
|
||||||
|
|
||||||
#undef CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_NAND_FSL_UPM 1
|
#define CONFIG_NAND_FSL_UPM 1
|
||||||
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */
|
#define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */
|
||||||
|
|||||||
@ -246,42 +246,4 @@
|
|||||||
|
|
||||||
#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
|
#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* NAND flash settings
|
|
||||||
*/
|
|
||||||
#if defined(CONFIG_CMD_NAND)
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define NAND_WAIT_READY(nand) NF_WaitRB()
|
|
||||||
|
|
||||||
#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
|
|
||||||
#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW)
|
|
||||||
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d)
|
|
||||||
#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d)
|
|
||||||
#define WRITE_NAND(d, adr) NF_Write(d)
|
|
||||||
#define READ_NAND(adr) NF_Read()
|
|
||||||
/* the following functions are NOP's because S3C24X0 handles this in hardware */
|
|
||||||
#define NAND_CTL_CLRALE(nandptr)
|
|
||||||
#define NAND_CTL_SETALE(nandptr)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr)
|
|
||||||
|
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2 1
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
#endif /* __CONFIG_H */
|
||||||
|
|||||||
@ -117,38 +117,8 @@
|
|||||||
|
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_MII
|
#define CONFIG_CMD_MII
|
||||||
#define CONFIG_CMD_NAND
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
|
|
||||||
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
|
|
||||||
|
|
||||||
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
|
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
|
||||||
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
|
|
||||||
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
|
|
||||||
|
|
||||||
#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
|
|
||||||
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
|
|
||||||
/* the following are NOP's in our implementation */
|
|
||||||
#define NAND_CTL_CLRALE(nandptr)
|
|
||||||
#define NAND_CTL_SETALE(nandptr)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr)
|
|
||||||
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 1
|
#define CONFIG_NR_DRAM_BANKS 1
|
||||||
#define PHYS_SDRAM 0x20000000
|
#define PHYS_SDRAM 0x20000000
|
||||||
|
|||||||
@ -121,38 +121,6 @@
|
|||||||
#define CONFIG_CMD_JFFS2
|
#define CONFIG_CMD_JFFS2
|
||||||
#define CONFIG_CMD_PING
|
#define CONFIG_CMD_PING
|
||||||
|
|
||||||
#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
|
|
||||||
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
|
|
||||||
|
|
||||||
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
|
|
||||||
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
|
|
||||||
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
|
|
||||||
|
|
||||||
#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2))
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0)
|
|
||||||
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
|
|
||||||
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
|
|
||||||
/* the following are NOP's in our implementation */
|
|
||||||
#define NAND_CTL_CLRALE(nandptr)
|
|
||||||
#define NAND_CTL_SETALE(nandptr)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr)
|
|
||||||
|
|
||||||
#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
|
|
||||||
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 1
|
#define CONFIG_NR_DRAM_BANKS 1
|
||||||
#define PHYS_SDRAM 0x20000000
|
#define PHYS_SDRAM 0x20000000
|
||||||
|
|||||||
@ -220,8 +220,6 @@
|
|||||||
/*
|
/*
|
||||||
* NAND Flash
|
* NAND Flash
|
||||||
*/
|
*/
|
||||||
#undef CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
|
#define CONFIG_SYS_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
|
||||||
#undef CONFIG_SYS_NAND1_BASE
|
#undef CONFIG_SYS_NAND1_BASE
|
||||||
|
|
||||||
@ -257,13 +255,6 @@
|
|||||||
#define CONFIG_MTD_DEBUG
|
#define CONFIG_MTD_DEBUG
|
||||||
#define CONFIG_MTD_DEBUG_VERBOSE 1
|
#define CONFIG_MTD_DEBUG_VERBOSE 1
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NO_FLASH 1
|
#define CONFIG_SYS_NO_FLASH 1
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_NAND 1
|
#define CONFIG_ENV_IS_IN_NAND 1
|
||||||
|
|||||||
@ -162,11 +162,6 @@
|
|||||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 ">>"
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 ">>"
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 0 /* Max number of NAND devices */
|
#define CONFIG_SYS_MAX_NAND_DEVICE 0 /* Max number of NAND devices */
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 1
|
#define CONFIG_NR_DRAM_BANKS 1
|
||||||
#define PHYS_SDRAM 0x20000000
|
#define PHYS_SDRAM 0x20000000
|
||||||
|
|||||||
@ -147,42 +147,6 @@
|
|||||||
#define CONFIG_BOOTP_HOSTNAME
|
#define CONFIG_BOOTP_HOSTNAME
|
||||||
#define CONFIG_BOOTP_BOOTPATH
|
#define CONFIG_BOOTP_BOOTPATH
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Board NAND Info.
|
|
||||||
*/
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)
|
|
||||||
#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0)
|
|
||||||
#define READ_NAND(adr) (*(volatile u16 *)0x6800A084)
|
|
||||||
#define NAND_WAIT_READY(nand) udelay(10)
|
|
||||||
|
|
||||||
#define NAND_NO_RB 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NAND_WP
|
|
||||||
#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0)
|
|
||||||
#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr)
|
|
||||||
#define NAND_CTL_SETALE(nandptr)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr)
|
|
||||||
#define NAND_DISABLE_CE(nand)
|
|
||||||
#define NAND_ENABLE_CE(nand)
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 3
|
#define CONFIG_BOOTDELAY 3
|
||||||
|
|
||||||
#ifdef NFS_BOOT_DEFAULTS
|
#ifdef NFS_BOOT_DEFAULTS
|
||||||
|
|||||||
@ -201,29 +201,6 @@
|
|||||||
#if defined(CONFIG_CMD_NAND)
|
#if defined(CONFIG_CMD_NAND)
|
||||||
#define CONFIG_NAND_S3C2410
|
#define CONFIG_NAND_S3C2410
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
||||||
#define SECTORSIZE 512
|
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define NAND_WAIT_READY(nand) NF_WaitRB()
|
|
||||||
#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH)
|
|
||||||
#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW)
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d)
|
|
||||||
#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d)
|
|
||||||
#define WRITE_NAND(d, adr) NF_Write(d)
|
|
||||||
#define READ_NAND(adr) NF_Read()
|
|
||||||
/* the following functions are NOP's because S3C24X0 handles this in hardware */
|
|
||||||
#define NAND_CTL_CLRALE(nandptr)
|
|
||||||
#define NAND_CTL_SETALE(nandptr)
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr)
|
|
||||||
#define NAND_CTL_SETCLE(nandptr)
|
|
||||||
/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */
|
|
||||||
#endif /* CONFIG_CMD_NAND */
|
#endif /* CONFIG_CMD_NAND */
|
||||||
|
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS
|
#define CONFIG_SETUP_MEMORY_TAGS
|
||||||
|
|||||||
@ -118,7 +118,6 @@
|
|||||||
|
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_MII
|
#define CONFIG_CMD_MII
|
||||||
#define CONFIG_CMD_NAND
|
|
||||||
#define CONFIG_CMD_NFS
|
#define CONFIG_CMD_NFS
|
||||||
#define CONFIG_CMD_PING
|
#define CONFIG_CMD_PING
|
||||||
|
|
||||||
@ -446,90 +445,9 @@
|
|||||||
#define NAND_SIZE 0x00010000 /* 64K */
|
#define NAND_SIZE 0x00010000 /* 64K */
|
||||||
#define NAND_BASE 0xF1000000
|
#define NAND_BASE 0xF1000000
|
||||||
|
|
||||||
/****************************************************************/
|
|
||||||
|
|
||||||
/* NAND */
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
#define CONFIG_SYS_NAND_BASE NAND_BASE
|
|
||||||
#define CONFIG_MTD_NAND_ECC_JFFS2
|
|
||||||
#define CONFIG_MTD_NAND_VERIFY_WRITE
|
|
||||||
#define CONFIG_MTD_NAND_UNSAFE
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
||||||
#undef NAND_NO_RB
|
|
||||||
|
|
||||||
#define SECTORSIZE 512
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
|
|
||||||
#define NAND_DISABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) |= (1 << (15 - 7)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_ENABLE_CE(nand) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETALE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) |= (1 << (15 - 15)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_CLRCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define NAND_CTL_SETCLE(nandptr) \
|
|
||||||
do { \
|
|
||||||
(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) |= (1 << (31 - 23)); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#ifndef NAND_NO_RB
|
|
||||||
#define NAND_WAIT_READY(nand) \
|
|
||||||
do { \
|
|
||||||
int _tries = 0; \
|
|
||||||
while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \
|
|
||||||
if (++_tries > 100000) \
|
|
||||||
break; \
|
|
||||||
} while (0)
|
|
||||||
#else
|
|
||||||
#define NAND_WAIT_READY(nand) udelay(12)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define WRITE_NAND_COMMAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND_ADDRESS(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define WRITE_NAND(d, adr) \
|
|
||||||
do { \
|
|
||||||
*(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define READ_NAND(adr) \
|
|
||||||
((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
#define CONFIG_SYS_DIRECT_FLASH_TFTP
|
||||||
#define CONFIG_SYS_DIRECT_NAND_TFTP
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|||||||
@ -147,12 +147,8 @@
|
|||||||
|
|
||||||
#define CONFIG_CMD_ASKENV
|
#define CONFIG_CMD_ASKENV
|
||||||
#define CONFIG_CMD_DHCP
|
#define CONFIG_CMD_DHCP
|
||||||
#define CONFIG_CMD_DOC
|
|
||||||
#define CONFIG_CMD_DATE
|
#define CONFIG_CMD_DATE
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_NAND_LEGACY
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Miscellaneous configurable options
|
* Miscellaneous configurable options
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -193,7 +193,6 @@
|
|||||||
/*
|
/*
|
||||||
* NAND Flash
|
* NAND Flash
|
||||||
*/
|
*/
|
||||||
#define CONFIG_NEW_NAND_CODE
|
|
||||||
#define CONFIG_SYS_NAND0_BASE 0x0
|
#define CONFIG_SYS_NAND0_BASE 0x0
|
||||||
#undef CONFIG_SYS_NAND1_BASE
|
#undef CONFIG_SYS_NAND1_BASE
|
||||||
|
|
||||||
@ -229,13 +228,6 @@
|
|||||||
#define CONFIG_MTD_DEBUG
|
#define CONFIG_MTD_DEBUG
|
||||||
#define CONFIG_MTD_DEBUG_VERBOSE 1
|
#define CONFIG_MTD_DEBUG_VERBOSE 1
|
||||||
|
|
||||||
#define ADDR_COLUMN 1
|
|
||||||
#define ADDR_PAGE 2
|
|
||||||
#define ADDR_COLUMN_PAGE 3
|
|
||||||
|
|
||||||
#define NAND_ChipID_UNKNOWN 0x00
|
|
||||||
#define NAND_MAX_FLOORS 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_NO_FLASH 1
|
#define CONFIG_SYS_NO_FLASH 1
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_NAND 1
|
#define CONFIG_ENV_IS_IN_NAND 1
|
||||||
|
|||||||
@ -50,7 +50,7 @@ extern void nand_wait_ready(struct mtd_info *mtd);
|
|||||||
* is supported now. If you add a chip with bigger oobsize/page
|
* is supported now. If you add a chip with bigger oobsize/page
|
||||||
* adjust this accordingly.
|
* adjust this accordingly.
|
||||||
*/
|
*/
|
||||||
#define NAND_MAX_OOBSIZE 128
|
#define NAND_MAX_OOBSIZE 218
|
||||||
#define NAND_MAX_PAGESIZE 4096
|
#define NAND_MAX_PAGESIZE 4096
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|||||||
@ -1,60 +0,0 @@
|
|||||||
/*
|
|
||||||
* u-boot/include/linux/mtd/nand_ids.h
|
|
||||||
*
|
|
||||||
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
|
|
||||||
* Steven J. Hill <sjhill@cotw.com>
|
|
||||||
*
|
|
||||||
* $Id: nand_ids.h,v 1.1 2000/10/13 16:16:26 mdeans Exp $
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* Info:
|
|
||||||
* Contains standard defines and IDs for NAND flash devices
|
|
||||||
*
|
|
||||||
* Changelog:
|
|
||||||
* 01-31-2000 DMW Created
|
|
||||||
* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
|
|
||||||
* so it can be used by other NAND flash device
|
|
||||||
* drivers. I also changed the copyright since none
|
|
||||||
* of the original contents of this file are specific
|
|
||||||
* to DoC devices. David can whack me with a baseball
|
|
||||||
* bat later if I did something naughty.
|
|
||||||
* 10-11-2000 SJH Added private NAND flash structure for driver
|
|
||||||
* 2000-10-13 BE Moved out of 'nand.h' - avoids duplication.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __LINUX_MTD_NAND_IDS_H
|
|
||||||
#define __LINUX_MTD_NAND_IDS_H
|
|
||||||
|
|
||||||
#ifndef CONFIG_NAND_LEGACY
|
|
||||||
#error This module is for the legacy NAND support
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static struct nand_flash_dev nand_flash_ids[] = {
|
|
||||||
{"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0},
|
|
||||||
{"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0},
|
|
||||||
{"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0},
|
|
||||||
{"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0},
|
|
||||||
{"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0},
|
|
||||||
{"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0},
|
|
||||||
{"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0},
|
|
||||||
{"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0},
|
|
||||||
{"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0},
|
|
||||||
{"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0},
|
|
||||||
{"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0},
|
|
||||||
{"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0},
|
|
||||||
{"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0},
|
|
||||||
{"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
|
|
||||||
{"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0},
|
|
||||||
{"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0},
|
|
||||||
{"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0},
|
|
||||||
{"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0},
|
|
||||||
{"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1},
|
|
||||||
{"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1},
|
|
||||||
{"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0},
|
|
||||||
{NULL,}
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* __LINUX_MTD_NAND_IDS_H */
|
|
||||||
@ -1,196 +0,0 @@
|
|||||||
/*
|
|
||||||
* linux/include/linux/mtd/nand.h
|
|
||||||
*
|
|
||||||
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
|
|
||||||
* Steven J. Hill <sjhill@cotw.com>
|
|
||||||
* Thomas Gleixner <gleixner@autronix.de>
|
|
||||||
*
|
|
||||||
* $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* Info:
|
|
||||||
* Contains standard defines and IDs for NAND flash devices
|
|
||||||
*
|
|
||||||
* Changelog:
|
|
||||||
* 01-31-2000 DMW Created
|
|
||||||
* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
|
|
||||||
* so it can be used by other NAND flash device
|
|
||||||
* drivers. I also changed the copyright since none
|
|
||||||
* of the original contents of this file are specific
|
|
||||||
* to DoC devices. David can whack me with a baseball
|
|
||||||
* bat later if I did something naughty.
|
|
||||||
* 10-11-2000 SJH Added private NAND flash structure for driver
|
|
||||||
* 10-24-2000 SJH Added prototype for 'nand_scan' function
|
|
||||||
* 10-29-2001 TG changed nand_chip structure to support
|
|
||||||
* hardwarespecific function for accessing control lines
|
|
||||||
* 02-21-2002 TG added support for different read/write adress and
|
|
||||||
* ready/busy line access function
|
|
||||||
* 02-26-2002 TG added chip_delay to nand_chip structure to optimize
|
|
||||||
* command delay times for different chips
|
|
||||||
* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
|
|
||||||
* defines in jffs2/wbuf.c
|
|
||||||
*/
|
|
||||||
#ifndef __LINUX_MTD_NAND_LEGACY_H
|
|
||||||
#define __LINUX_MTD_NAND_LEGACY_H
|
|
||||||
|
|
||||||
#ifndef CONFIG_NAND_LEGACY
|
|
||||||
#error This module is for the legacy NAND support
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* The maximum number of NAND chips in an array */
|
|
||||||
#ifndef CONFIG_SYS_NAND_MAX_CHIPS
|
|
||||||
#define CONFIG_SYS_NAND_MAX_CHIPS 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Standard NAND flash commands
|
|
||||||
*/
|
|
||||||
#define NAND_CMD_READ0 0
|
|
||||||
#define NAND_CMD_READ1 1
|
|
||||||
#define NAND_CMD_PAGEPROG 0x10
|
|
||||||
#define NAND_CMD_READOOB 0x50
|
|
||||||
#define NAND_CMD_ERASE1 0x60
|
|
||||||
#define NAND_CMD_STATUS 0x70
|
|
||||||
#define NAND_CMD_SEQIN 0x80
|
|
||||||
#define NAND_CMD_READID 0x90
|
|
||||||
#define NAND_CMD_ERASE2 0xd0
|
|
||||||
#define NAND_CMD_RESET 0xff
|
|
||||||
|
|
||||||
/*
|
|
||||||
* NAND Private Flash Chip Data
|
|
||||||
*
|
|
||||||
* Structure overview:
|
|
||||||
*
|
|
||||||
* IO_ADDR - address to access the 8 I/O lines of the flash device
|
|
||||||
*
|
|
||||||
* hwcontrol - hardwarespecific function for accesing control-lines
|
|
||||||
*
|
|
||||||
* dev_ready - hardwarespecific function for accesing device ready/busy line
|
|
||||||
*
|
|
||||||
* chip_lock - spinlock used to protect access to this structure
|
|
||||||
*
|
|
||||||
* wq - wait queue to sleep on if a NAND operation is in progress
|
|
||||||
*
|
|
||||||
* state - give the current state of the NAND device
|
|
||||||
*
|
|
||||||
* page_shift - number of address bits in a page (column address bits)
|
|
||||||
*
|
|
||||||
* data_buf - data buffer passed to/from MTD user modules
|
|
||||||
*
|
|
||||||
* data_cache - data cache for redundant page access and shadow for
|
|
||||||
* ECC failure
|
|
||||||
*
|
|
||||||
* ecc_code_buf - used only for holding calculated or read ECCs for
|
|
||||||
* a page read or written when ECC is in use
|
|
||||||
*
|
|
||||||
* reserved - padding to make structure fall on word boundary if
|
|
||||||
* when ECC is in use
|
|
||||||
*/
|
|
||||||
struct Nand {
|
|
||||||
char floor, chip;
|
|
||||||
unsigned long curadr;
|
|
||||||
unsigned char curmode;
|
|
||||||
/* Also some erase/write/pipeline info when we get that far */
|
|
||||||
};
|
|
||||||
|
|
||||||
struct nand_chip {
|
|
||||||
int page_shift;
|
|
||||||
u_char *data_buf;
|
|
||||||
u_char *data_cache;
|
|
||||||
int cache_page;
|
|
||||||
u_char ecc_code_buf[6];
|
|
||||||
u_char reserved[2];
|
|
||||||
char ChipID; /* Type of DiskOnChip */
|
|
||||||
struct Nand *chips;
|
|
||||||
int chipshift;
|
|
||||||
char* chips_name;
|
|
||||||
unsigned long erasesize;
|
|
||||||
unsigned long mfr; /* Flash IDs - only one type of flash per device */
|
|
||||||
unsigned long id;
|
|
||||||
char* name;
|
|
||||||
int numchips;
|
|
||||||
char page256;
|
|
||||||
char pageadrlen;
|
|
||||||
unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */
|
|
||||||
unsigned long totlen;
|
|
||||||
uint oobblock; /* Size of OOB blocks (e.g. 512) */
|
|
||||||
uint oobsize; /* Amount of OOB data per block (e.g. 16) */
|
|
||||||
uint eccsize;
|
|
||||||
int bus16;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* NAND Flash Manufacturer ID Codes
|
|
||||||
*/
|
|
||||||
#define NAND_MFR_TOSHIBA 0x98
|
|
||||||
#define NAND_MFR_SAMSUNG 0xec
|
|
||||||
|
|
||||||
/*
|
|
||||||
* NAND Flash Device ID Structure
|
|
||||||
*
|
|
||||||
* Structure overview:
|
|
||||||
*
|
|
||||||
* name - Complete name of device
|
|
||||||
*
|
|
||||||
* manufacture_id - manufacturer ID code of device.
|
|
||||||
*
|
|
||||||
* model_id - model ID code of device.
|
|
||||||
*
|
|
||||||
* chipshift - total number of address bits for the device which
|
|
||||||
* is used to calculate address offsets and the total
|
|
||||||
* number of bytes the device is capable of.
|
|
||||||
*
|
|
||||||
* page256 - denotes if flash device has 256 byte pages or not.
|
|
||||||
*
|
|
||||||
* pageadrlen - number of bytes minus one needed to hold the
|
|
||||||
* complete address into the flash array. Keep in
|
|
||||||
* mind that when a read or write is done to a
|
|
||||||
* specific address, the address is input serially
|
|
||||||
* 8 bits at a time. This structure member is used
|
|
||||||
* by the read/write routines as a loop index for
|
|
||||||
* shifting the address out 8 bits at a time.
|
|
||||||
*
|
|
||||||
* erasesize - size of an erase block in the flash device.
|
|
||||||
*/
|
|
||||||
struct nand_flash_dev {
|
|
||||||
char * name;
|
|
||||||
int manufacture_id;
|
|
||||||
int model_id;
|
|
||||||
int chipshift;
|
|
||||||
char page256;
|
|
||||||
char pageadrlen;
|
|
||||||
unsigned long erasesize;
|
|
||||||
int bus16;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Constants for oob configuration
|
|
||||||
*/
|
|
||||||
#define NAND_NOOB_ECCPOS0 0
|
|
||||||
#define NAND_NOOB_ECCPOS1 1
|
|
||||||
#define NAND_NOOB_ECCPOS2 2
|
|
||||||
#define NAND_NOOB_ECCPOS3 3
|
|
||||||
#define NAND_NOOB_ECCPOS4 6
|
|
||||||
#define NAND_NOOB_ECCPOS5 7
|
|
||||||
#define NAND_NOOB_BADBPOS -1
|
|
||||||
#define NAND_NOOB_ECCVPOS -1
|
|
||||||
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS0 0
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS1 1
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS2 2
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS3 3
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS4 6
|
|
||||||
#define NAND_JFFS2_OOB_ECCPOS5 7
|
|
||||||
#define NAND_JFFS2_OOB_BADBPOS 5
|
|
||||||
#define NAND_JFFS2_OOB_ECCVPOS 4
|
|
||||||
|
|
||||||
#define NAND_JFFS2_OOB8_FSDAPOS 6
|
|
||||||
#define NAND_JFFS2_OOB16_FSDAPOS 8
|
|
||||||
#define NAND_JFFS2_OOB8_FSDALEN 2
|
|
||||||
#define NAND_JFFS2_OOB16_FSDALEN 8
|
|
||||||
|
|
||||||
unsigned long nand_probe(unsigned long physadr);
|
|
||||||
#endif /* __LINUX_MTD_NAND_LEGACY_H */
|
|
||||||
@ -26,7 +26,6 @@
|
|||||||
|
|
||||||
extern void nand_init(void);
|
extern void nand_init(void);
|
||||||
|
|
||||||
#ifndef CONFIG_NAND_LEGACY
|
|
||||||
#include <linux/mtd/compat.h>
|
#include <linux/mtd/compat.h>
|
||||||
#include <linux/mtd/mtd.h>
|
#include <linux/mtd/mtd.h>
|
||||||
#include <linux/mtd/nand.h>
|
#include <linux/mtd/nand.h>
|
||||||
@ -130,5 +129,4 @@ void board_nand_select_device(struct nand_chip *nand, int chip);
|
|||||||
|
|
||||||
__attribute__((noreturn)) void nand_boot(void);
|
__attribute__((noreturn)) void nand_boot(void);
|
||||||
|
|
||||||
#endif /* !CONFIG_NAND_LEGACY */
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -172,9 +172,7 @@ uint32_t ZEXPORT crc32 (uint32_t crc, const Bytef *buf, uInt len)
|
|||||||
return crc ^ 0xffffffffL;
|
return crc ^ 0xffffffffL;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_JFFS2) || \
|
#if defined(CONFIG_CMD_JFFS2) || defined(CONFIG_CMD_NAND)
|
||||||
(defined(CONFIG_CMD_NAND) \
|
|
||||||
&& !defined(CONFIG_NAND_LEGACY))
|
|
||||||
|
|
||||||
/* No ones complement version. JFFS2 (and other things ?)
|
/* No ones complement version. JFFS2 (and other things ?)
|
||||||
* don't use ones compliment in their CRC calculations.
|
* don't use ones compliment in their CRC calculations.
|
||||||
|
|||||||
@ -73,7 +73,7 @@ $(obj)gpio.c:
|
|||||||
|
|
||||||
$(obj)ndfc.c:
|
$(obj)ndfc.c:
|
||||||
@rm -f $(obj)ndfc.c
|
@rm -f $(obj)ndfc.c
|
||||||
ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
|
ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
|
||||||
|
|
||||||
$(obj)resetvec.S:
|
$(obj)resetvec.S:
|
||||||
@rm -f $(obj)resetvec.S
|
@rm -f $(obj)resetvec.S
|
||||||
|
|||||||
@ -59,7 +59,7 @@ $(nandobj)u-boot-spl: $(OBJS)
|
|||||||
# from cpu directory
|
# from cpu directory
|
||||||
$(obj)ndfc.c:
|
$(obj)ndfc.c:
|
||||||
@rm -f $(obj)ndfc.c
|
@rm -f $(obj)ndfc.c
|
||||||
ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
|
ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
|
||||||
|
|
||||||
$(obj)resetvec.S:
|
$(obj)resetvec.S:
|
||||||
@rm -f $(obj)resetvec.S
|
@rm -f $(obj)resetvec.S
|
||||||
|
|||||||
@ -64,7 +64,7 @@ $(nandobj)u-boot-spl: $(OBJS)
|
|||||||
# from cpu directory
|
# from cpu directory
|
||||||
$(obj)ndfc.c:
|
$(obj)ndfc.c:
|
||||||
@rm -f $(obj)ndfc.c
|
@rm -f $(obj)ndfc.c
|
||||||
ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
|
ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
|
||||||
|
|
||||||
$(obj)resetvec.S:
|
$(obj)resetvec.S:
|
||||||
@rm -f $(obj)resetvec.S
|
@rm -f $(obj)resetvec.S
|
||||||
|
|||||||
@ -71,7 +71,7 @@ $(obj)ecc.h:
|
|||||||
|
|
||||||
$(obj)ndfc.c:
|
$(obj)ndfc.c:
|
||||||
@rm -f $(obj)ndfc.c
|
@rm -f $(obj)ndfc.c
|
||||||
ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
|
ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
|
||||||
|
|
||||||
$(obj)resetvec.S:
|
$(obj)resetvec.S:
|
||||||
@rm -f $(obj)resetvec.S
|
@rm -f $(obj)resetvec.S
|
||||||
|
|||||||
@ -63,7 +63,7 @@ $(obj)denali_data_eye.c:
|
|||||||
|
|
||||||
$(obj)ndfc.c:
|
$(obj)ndfc.c:
|
||||||
@rm -f $(obj)ndfc.c
|
@rm -f $(obj)ndfc.c
|
||||||
ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
|
ln -s $(SRCTREE)/drivers/mtd/nand/ndfc.c $(obj)ndfc.c
|
||||||
|
|
||||||
$(obj)resetvec.S:
|
$(obj)resetvec.S:
|
||||||
@rm -f $(obj)resetvec.S
|
@rm -f $(obj)resetvec.S
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user