Tegra: clk: always use find_best_divider() for periph clocks
When adjusting peripheral clocks always use find_best_divider() instead of clk_get_divider() even when a secondary divider is not available. In the case where is requested clock is too slow to be derived from the parent clock this allows a best effort to get close to the requested clock. This comes up for commands like "sf" where the user can pass a clock speed on the command line or "sspi" where the clock is hardcoded to 1MHz, but the Tegra114 SPI controller can't go that low. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -321,17 +321,17 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
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unsigned effective_rate;
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int mux_bits, divider_bits, source;
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int divider;
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int xdiv = 0;
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/* work out the source clock and set it */
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source = get_periph_clock_source(periph_id, parent, &mux_bits,
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÷r_bits);
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divider = find_best_divider(divider_bits, pll_rate[parent],
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rate, &xdiv);
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if (extra_div)
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divider = find_best_divider(divider_bits, pll_rate[parent],
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rate, extra_div);
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else
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divider = clk_get_divider(divider_bits, pll_rate[parent],
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rate);
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*extra_div = xdiv;
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assert(divider >= 0);
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if (adjust_periph_pll(periph_id, source, mux_bits, divider))
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return -1U;
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