Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig

This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2017-01-23 13:31:19 -07:00 committed by Tom Rini
parent d02f5ea301
commit a421192fb8
34 changed files with 31 additions and 21 deletions

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@ -12,6 +12,7 @@ config ARC
bool "ARC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select ARCH_EARLY_INIT_R
config ARM
bool "ARM architecture"

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@ -8,7 +8,6 @@
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_LMB

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@ -607,6 +607,7 @@ config ARCH_SOCFPGA
select DM_SPI_FLASH
select DM_SPI
select ENABLE_ARM_SOC_BOOT0_HOOK
select ARCH_EARLY_INIT_R
config TARGET_CM_T43
bool "Support cm_t43"

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@ -5,6 +5,7 @@ config ARCH_LS1012A
select SYS_FSL_DDR_BE
select SYS_FSL_MMDC
select SYS_FSL_ERRATUM_A010315
select ARCH_EARLY_INIT_R
config ARCH_LS1043A
bool
@ -22,6 +23,7 @@ config ARCH_LS1043A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
config ARCH_LS1046A
bool
@ -38,6 +40,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
config ARCH_LS2080A
bool
@ -62,6 +65,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009803
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010165
select ARCH_EARLY_INIT_R
config FSL_LSCH2
bool

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@ -399,4 +399,17 @@ config DISPLAY_BOARDINFO
when U-Boot starts up. The board function checkboard() is called
to do this.
menu "Start-up hooks"
config ARCH_EARLY_INIT_R
bool "Call arch-specific init soon after relocation"
default y if X86
help
With this option U-Boot will call arch_early_init_r() soon after
relocation. Driver model is running by this point, and the cache
is on. Note that board_early_init_r() is called first, if
enabled. This can be used to set up architecture-specific devices.
endmenu
source "common/spl/Kconfig"

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@ -17,6 +17,7 @@ CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set

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@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
CONFIG_TARGET_COUGARCANYON2=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set

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@ -16,6 +16,7 @@ CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set

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@ -5,6 +5,7 @@ CONFIG_TARGET_EFI=y
CONFIG_FIT=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_IMLS is not set

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@ -17,6 +17,7 @@ CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set

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@ -9,6 +9,7 @@ CONFIG_AHCI=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_EARLY_INIT_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y

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@ -9,6 +9,7 @@ CONFIG_AHCI=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set

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@ -9,6 +9,7 @@ CONFIG_AHCI=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set

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@ -6,6 +6,7 @@ CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set

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@ -6,6 +6,7 @@ CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set

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@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_EARLY_INIT_R=y
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300

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@ -16,6 +16,7 @@ CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set

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@ -15,7 +15,6 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \

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@ -15,7 +15,6 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SMSC_LPC47M

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@ -15,7 +15,6 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT
/* ns16550 UART is memory-mapped in Quark SoC */

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@ -89,8 +89,6 @@
#define CONFIG_CMD_ENV
#undef CONFIG_CMD_IMLS
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SYS_HZ 1000
#define CONFIG_HWCONFIG

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@ -185,7 +185,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128

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@ -158,7 +158,6 @@
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128

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@ -175,7 +175,6 @@ unsigned long long get_qixis_addr(void);
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_ARCH_EARLY_INIT_R
/* Physical Memory Map */
/* fixme: these need to be checked against the board */

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@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_SMSC_LPC47M

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@ -13,7 +13,6 @@
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SYS_TEXT_BASE 0x00000000

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@ -11,7 +11,6 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SYS_TEXT_BASE 0x00000000

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@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \
"stdout=serial,vidconsole\0" \

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@ -130,7 +130,6 @@
#define CONFIG_OMAP3_SPI
#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_FORMIKE
#define DISPL_PLL_SPREAD_SPECTRUM
#endif

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@ -16,7 +16,6 @@
*/
#define CONFIG_DISPLAY_BOARDINFO_LATE
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CLOCKS

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@ -23,8 +23,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

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@ -15,7 +15,6 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \

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@ -40,8 +40,6 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_ARCH_EARLY_INIT_R
#undef CONFIG_ENV_IS_NOWHERE
#undef CONFIG_ENV_SIZE
#define CONFIG_ENV_SIZE 0x1000

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@ -109,7 +109,6 @@ CONFIG_AP_SH4A_4A
CONFIG_ARCH_ADPAG101P
CONFIG_ARCH_CPU_INIT
CONFIG_ARCH_CSB226
CONFIG_ARCH_EARLY_INIT_R
CONFIG_ARCH_HAS_ILOG2_U32
CONFIG_ARCH_HAS_ILOG2_U64
CONFIG_ARCH_INNOKOM