Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R Signed-off-by: Simon Glass <sjg@chromium.org>
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d02f5ea301
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a421192fb8
@ -12,6 +12,7 @@ config ARC
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bool "ARC architecture"
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select HAVE_PRIVATE_LIBGCC
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select SUPPORT_OF_CONTROL
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select ARCH_EARLY_INIT_R
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config ARM
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bool "ARM architecture"
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@ -8,7 +8,6 @@
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#define __ASM_ARC_CONFIG_H_
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#define CONFIG_SYS_BOOT_RAMDISK_HIGH
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_LMB
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@ -607,6 +607,7 @@ config ARCH_SOCFPGA
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select DM_SPI_FLASH
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select DM_SPI
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select ENABLE_ARM_SOC_BOOT0_HOOK
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select ARCH_EARLY_INIT_R
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config TARGET_CM_T43
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bool "Support cm_t43"
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@ -5,6 +5,7 @@ config ARCH_LS1012A
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select SYS_FSL_DDR_BE
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select SYS_FSL_MMDC
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select SYS_FSL_ERRATUM_A010315
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select ARCH_EARLY_INIT_R
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config ARCH_LS1043A
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bool
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@ -22,6 +23,7 @@ config ARCH_LS1043A
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select SYS_FSL_ERRATUM_A010539
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select SYS_FSL_HAS_DDR3
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select SYS_FSL_HAS_DDR4
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select ARCH_EARLY_INIT_R
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config ARCH_LS1046A
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bool
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@ -38,6 +40,7 @@ config ARCH_LS1046A
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select SYS_FSL_ERRATUM_A010539
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select SYS_FSL_HAS_DDR4
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select SYS_FSL_SRDS_2
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select ARCH_EARLY_INIT_R
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config ARCH_LS2080A
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bool
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@ -62,6 +65,7 @@ config ARCH_LS2080A
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select SYS_FSL_ERRATUM_A009803
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select SYS_FSL_ERRATUM_A009942
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select SYS_FSL_ERRATUM_A010165
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select ARCH_EARLY_INIT_R
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config FSL_LSCH2
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bool
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@ -399,4 +399,17 @@ config DISPLAY_BOARDINFO
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when U-Boot starts up. The board function checkboard() is called
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to do this.
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menu "Start-up hooks"
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config ARCH_EARLY_INIT_R
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bool "Call arch-specific init soon after relocation"
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default y if X86
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help
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With this option U-Boot will call arch_early_init_r() soon after
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relocation. Driver model is running by this point, and the cache
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is on. Note that board_early_init_r() is called first, if
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enabled. This can be used to set up architecture-specific devices.
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endmenu
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source "common/spl/Kconfig"
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@ -17,6 +17,7 @@ CONFIG_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_ARCH_EARLY_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
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CONFIG_TARGET_COUGARCANYON2=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_ARCH_EARLY_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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@ -16,6 +16,7 @@ CONFIG_FIT_SIGNATURE=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_ARCH_EARLY_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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@ -5,6 +5,7 @@ CONFIG_TARGET_EFI=y
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CONFIG_FIT=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_ARCH_EARLY_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_BOOTM is not set
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# CONFIG_CMD_IMLS is not set
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@ -17,6 +17,7 @@ CONFIG_FIT_SIGNATURE=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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@ -9,6 +9,7 @@ CONFIG_AHCI=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_SF=y
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@ -9,6 +9,7 @@ CONFIG_AHCI=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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@ -9,6 +9,7 @@ CONFIG_AHCI=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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@ -6,6 +6,7 @@ CONFIG_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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@ -6,6 +6,7 @@ CONFIG_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
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@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_SPL=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
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@ -16,6 +16,7 @@ CONFIG_FIT_SIGNATURE=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_ARCH_EARLY_INIT_R is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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@ -15,7 +15,6 @@
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
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@ -15,7 +15,6 @@
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SMSC_LPC47M
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@ -15,7 +15,6 @@
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_ARCH_MISC_INIT
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/* ns16550 UART is memory-mapped in Quark SoC */
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@ -89,8 +89,6 @@
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#define CONFIG_CMD_ENV
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#undef CONFIG_CMD_IMLS
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_HWCONFIG
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@ -185,7 +185,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_HWCONFIG
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#define HWCONFIG_BUFFER_SIZE 128
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@ -158,7 +158,6 @@
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_HWCONFIG
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#define HWCONFIG_BUFFER_SIZE 128
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@ -175,7 +175,6 @@ unsigned long long get_qixis_addr(void);
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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#define CONFIG_ARCH_EARLY_INIT_R
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/* Physical Memory Map */
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/* fixme: these need to be checked against the board */
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@ -14,7 +14,6 @@
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#include <configs/x86-common.h>
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_SMSC_LPC47M
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@ -13,7 +13,6 @@
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#include <configs/x86-common.h>
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \
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"stdout=serial,vidconsole\0" \
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#define CONFIG_OMAP3_SPI
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#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_FORMIKE
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#define DISPL_PLL_SPREAD_SPECTRUM
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#endif
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*/
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_CLOCKS
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#define VIDEO_IO_OFFSET 0
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#define CONFIG_X86EMU_RAW_IO
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \
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"stdout=serial,vidconsole\0" \
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"stderr=serial,vidconsole\0"
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \
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#define VIDEO_IO_OFFSET 0
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#define CONFIG_X86EMU_RAW_IO
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#define CONFIG_ARCH_EARLY_INIT_R
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#undef CONFIG_ENV_IS_NOWHERE
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#undef CONFIG_ENV_SIZE
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#define CONFIG_ENV_SIZE 0x1000
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CONFIG_ARCH_ADPAG101P
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CONFIG_ARCH_CPU_INIT
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CONFIG_ARCH_CSB226
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CONFIG_ARCH_EARLY_INIT_R
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CONFIG_ARCH_HAS_ILOG2_U32
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CONFIG_ARCH_HAS_ILOG2_U64
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CONFIG_ARCH_INNOKOM
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