spear: fix build errors for spear3xx/spear600 platforms
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Vipin Kumar <vipin.kumar@st.com>
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@ -46,9 +46,7 @@ int dram_init(void)
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struct xloader_table_1_2 *table_1_2;
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struct chip_data *chip = &chip_data;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1,
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PHYS_SDRAM_1_MAXSIZE);
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gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
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if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) {
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table_1_1 = &xloader_tb->table.table_1_1;
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@ -66,6 +64,12 @@ int dram_init(void)
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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int misc_init_r(void)
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{
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#if defined(CONFIG_CMD_NET)
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@ -86,6 +86,8 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE
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/* NAND FLASH Configuration */
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_NAND_SPEAR 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_MTD_NAND_VERIFY_WRITE 1
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@ -209,4 +211,14 @@
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#define PHYS_SDRAM_1 0x00000000
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#define PHYS_SDRAM_1_MAXSIZE 0x40000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#endif
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