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Cleanup

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This commit is contained in:
wdenk 2003-12-27 19:29:48 +00:00
parent 7cb22f97ee
commit a2f34be7dd
1 changed files with 42 additions and 47 deletions
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89
cpu/mips/incaip_clock.c
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@ -40,33 +40,28 @@
* frequency of the CPU. Don't use the macros, which are set to init the CPU
* frequency in the ROM code.
*/
uint incaip_get_cpuclk(void)
uint incaip_get_cpuclk (void)
{
/*-------------------------------------------------------------------------*/
/* CPU Clock Input Multiplexer (MUX I) */
/* Multiplexer MUX I selects the maximum input clock to the CPU. */
/*-------------------------------------------------------------------------*/
if (*((volatile ulong*)INCA_IP_CGU_CGU_MUXCR) & INCA_IP_CGU_CGU_MUXCR_MUXI)
{
/* MUX I set to 150 MHz clock */
return 150000000;
}
else
{
/* MUX I set to 100/133 MHz clock */
if (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0x40)
{
/* Division value is 1/3, maximum CPU operating */
/* frequency is 133.3 MHz */
return 130000000;
}
else
{
/* Division value is 1/4, maximum CPU operating */
/* frequency is 100 MHz */
return 100000000;
}
}
/*-------------------------------------------------------------------------*/
/* CPU Clock Input Multiplexer (MUX I) */
/* Multiplexer MUX I selects the maximum input clock to the CPU. */
/*-------------------------------------------------------------------------*/
if (*((volatile ulong *) INCA_IP_CGU_CGU_MUXCR) &
INCA_IP_CGU_CGU_MUXCR_MUXI) {
/* MUX I set to 150 MHz clock */
return 150000000;
} else {
/* MUX I set to 100/133 MHz clock */
if (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0x40) {
/* Division value is 1/3, maximum CPU operating */
/* frequency is 133.3 MHz */
return 130000000;
} else {
/* Division value is 1/4, maximum CPU operating */
/* frequency is 100 MHz */
return 100000000;
}
}
}
/*******************************************************************************
@ -83,36 +78,36 @@ uint incaip_get_cpuclk(void)
* frequency in the ROM code.
* The calculation for the
*/
uint incaip_get_fpiclk(void)
uint incaip_get_fpiclk (void)
{
uint clkCPU;
uint clkCPU;
clkCPU = incaip_get_cpuclk();
clkCPU = incaip_get_cpuclk ();
switch (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0xC)
{
case 0x4:
return clkCPU >> 1; /* devided by 2 */
break;
case 0x8:
return clkCPU >> 2; /* devided by 4 */
break;
default:
return clkCPU;
break;
}
switch (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0xC) {
case 0x4:
return clkCPU >> 1; /* devided by 2 */
break;
case 0x8:
return clkCPU >> 2; /* devided by 4 */
break;
default:
return clkCPU;
break;
}
}
int incaip_set_cpuclk(void)
int incaip_set_cpuclk (void)
{
extern void ebu_init(long);
extern void cgu_init(long);
uchar tmp[64];
ulong cpuclk;
if (getenv_r("cpuclk", tmp, sizeof(tmp)) > 0)
{
cpuclk = simple_strtoul(tmp, NULL, 10) * 1000000;
ebu_init(cpuclk);
cgu_init(cpuclk);
if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0) {
cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
ebu_init (cpuclk);
cgu_init (cpuclk);
}
return 0;