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x86: Add a simple superio driver for SMSC LPC47M

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On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2014-12-12 21:05:25 +08:00 committed by Simon Glass
parent 568868dda9
commit a2927e09bc
4 changed files with 143 additions and 0 deletions
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90
arch/x86/include/asm/pnp_def.h Normal file
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@ -0,0 +1,90 @@
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*
* Adapted from coreboot src/include/device/pnp_def.h
* and arch/x86/include/arch/io.h
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_PNP_DEF_H_
#define _ASM_PNP_DEF_H_
#include <asm/io.h>
#define PNP_IDX_EN 0x30
#define PNP_IDX_IO0 0x60
#define PNP_IDX_IO1 0x62
#define PNP_IDX_IO2 0x64
#define PNP_IDX_IO3 0x66
#define PNP_IDX_IRQ0 0x70
#define PNP_IDX_IRQ1 0x72
#define PNP_IDX_DRQ0 0x74
#define PNP_IDX_DRQ1 0x75
#define PNP_IDX_MSC0 0xf0
#define PNP_IDX_MSC1 0xf1
/* Generic functions for pnp devices */
/*
* pnp device is a 16-bit integer composed of its i/o port address at high byte
* and logic function number at low byte.
*/
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value)
{
uint8_t port = dev >> 8;
outb(reg, port);
outb(value, port + 1);
}
static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg)
{
uint8_t port = dev >> 8;
outb(reg, port);
return inb(port + 1);
}
static inline void pnp_set_logical_device(uint16_t dev)
{
uint8_t device = dev & 0xff;
pnp_write_config(dev, 0x07, device);
}
static inline void pnp_set_enable(uint16_t dev, int enable)
{
pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0);
}
static inline int pnp_read_enable(uint16_t dev)
{
return !!pnp_read_config(dev, PNP_IDX_EN);
}
static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase)
{
pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
pnp_write_config(dev, index + 1, iobase & 0xff);
}
static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index)
{
return ((uint16_t)(pnp_read_config(dev, index)) << 8) |
pnp_read_config(dev, index + 1);
}
static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq)
{
pnp_write_config(dev, index, irq);
}
static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq)
{
pnp_write_config(dev, index, drq & 0xff);
}
#endif /* _ASM_PNP_DEF_H_ */

1
drivers/misc/Makefile
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@ -24,6 +24,7 @@ obj-$(CONFIG_PDSP188x) += pdsp188x.o
ifdef CONFIG_DM_I2C
obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
endif
obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
obj-$(CONFIG_STATUS_LED) += status_led.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o

33
drivers/misc/smsc_lpc47m.c Normal file
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@ -0,0 +1,33 @@
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/pnp_def.h>
static void pnp_enter_conf_state(u16 dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
static void pnp_exit_conf_state(u16 dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
void lpc47m_enable_serial(u16 dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}

19
include/smsc_lpc47m.h Normal file
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@ -0,0 +1,19 @@
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SMSC_LPC47M_H_
#define _SMSC_LPC47M_H_
/**
* Configure the base I/O port of the specified serial device and enable the
* serial device.
*
* @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
* @iobase: Processor I/O port address to assign to this serial device.
*/
void lpc47m_enable_serial(u16 dev, u16 iobase);
#endif /* _SMSC_LPC47M_H_ */