* Patch by George G. Davis, 06 Jul 2004:
- update mach-types.h to latest arm.linux.org.uk master list - Set correct OMAP1610 bi_arch_number for build target * Patch by Curt Brune, 06 Jul 2004: evb4510: add support for timer interrupt; cleanup
This commit is contained in:
wdenk
parent
b9283e2dbe
commit
a1f4a3dd05
@ -2,6 +2,13 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Patch by George G. Davis, 06 Jul 2004:
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- update mach-types.h to latest arm.linux.org.uk master list
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- Set correct OMAP1610 bi_arch_number for build target
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* Patch by Curt Brune, 06 Jul 2004:
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evb4510: add support for timer interrupt; cleanup
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* Patch by Dan Poirot, 06 Jul 2004:
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Fix sbc8260 environment variables
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@ -25,14 +25,10 @@
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#include <asm/hardware.h>
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#include <command.h>
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#ifdef CONFIG_EVB4510
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/* ------------------------------------------------------------------------- */
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#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF))
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#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF)
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#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); }
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#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); }
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/*
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* Miscelaneous platform dependent initialisations
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*/
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@ -51,25 +47,6 @@ int board_init (void)
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PUT_REG( REG_IOPMODE, 0xFFFF);
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PUT_REG( REG_IOPDATA, 0xFF);
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/* enable LED 7 to show we're alive */
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SET_LED( 7);
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/* configure free running timer 1 */
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/* Stop timer 1 */
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CLR_REG( REG_TMOD, TM1_RUN);
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/* Configure for toggle mode */
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SET_REG( REG_TMOD, TM1_TOGGLE);
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/* Load Timer data register with count down value */
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PUT_REG( REG_TDATA1, 0xFFFFFFFF);
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/* Clear timer counter register */
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PUT_REG( REG_TCNT1, 0x0);
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/* Start timer -- count down timer */
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SET_REG( REG_TMOD, TM1_RUN);
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return 0;
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}
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@ -84,3 +61,5 @@ int dram_init (void)
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#endif
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return 0;
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}
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#endif
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@ -32,6 +32,7 @@
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*/
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#include <common.h>
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#include <asm/mach-types.h>
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#if defined(CONFIG_OMAP1610)
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#include <./configs/omap1510.h>
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#endif
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@ -62,9 +63,12 @@ int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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/* arch number of OMAP 1510-Board */
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/* to be changed for OMAP 1610 Board */
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gd->bd->bi_arch_number = 234;
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if (machine_is_omap_h2())
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2;
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else if (machine_is_omap_innovator())
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
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else
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_GENERIC;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x10000100;
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@ -46,6 +46,15 @@ extern void reset_cpu(ulong addr);
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#define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
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#endif
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#ifdef CONFIG_S3C4510B
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/* require interrupts for the S3C4510B */
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# ifndef CONFIG_USE_IRQ
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# error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
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# else
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static struct _irq_handler IRQ_HANDLER[N_IRQS];
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# endif
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#endif /* CONFIG_S3C4510B */
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#ifdef CONFIG_USE_IRQ
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/* enable IRQ/FIQ interrupts */
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void enable_interrupts (void)
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@ -75,7 +84,7 @@ int disable_interrupts (void)
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: "memory");
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return (old & 0x80) == 0;
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}
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#else
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#else /* CONFIG_USE_IRQ */
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void enable_interrupts (void)
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{
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return;
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@ -86,7 +95,6 @@ int disable_interrupts (void)
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}
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#endif
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void bad_mode (void)
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{
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panic ("Resetting CPU ...\n");
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@ -174,10 +182,41 @@ void do_fiq (struct pt_regs *pt_regs)
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void do_irq (struct pt_regs *pt_regs)
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{
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM)
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printf ("interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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#elif defined(CONFIG_S3C4510B)
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unsigned int pending;
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while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) { /* sentinal value for no pending interrutps */
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IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
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/* clear pending interrupt */
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PUT_REG( REG_INTPEND, (1<<(pending>>2)));
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}
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#else
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#error do_irq() not defined for this CPU type
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#endif
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}
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#ifdef CONFIG_S3C4510B
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static void default_isr( void *data) {
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printf ("default_isr(): called for IRQ %d\n", (int)data);
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}
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static void timer_isr( void *data) {
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unsigned int *pTime = (unsigned int *)data;
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(*pTime)++;
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if ( !(*pTime % (CFG_HZ/4))) {
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/* toggle LED 0 */
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PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
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}
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}
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#endif
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static ulong timestamp;
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static ulong lastdec;
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@ -209,8 +248,48 @@ int interrupt_init (void)
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/* set timer 1 counter */
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lastdec = IO_TC1D = TIMER_LOAD_VAL;
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#elif defined(CONFIG_S3C4510B)
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/* Nothing to do, interrupts not supported */
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int i;
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/* install default interrupt handlers */
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for ( i = 0; i < N_IRQS; i++) {
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IRQ_HANDLER[i].m_data = (void *)i;
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IRQ_HANDLER[i].m_func = default_isr;
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}
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/* configure interrupts for IRQ mode */
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PUT_REG( REG_INTMODE, 0x0);
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/* clear any pending interrupts */
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PUT_REG( REG_INTPEND, 0x1FFFFF);
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lastdec = 0;
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/* install interrupt handler for timer */
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IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp;
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IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
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/* configure free running timer 0 */
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PUT_REG( REG_TMOD, 0x0);
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/* Stop timer 0 */
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CLR_REG( REG_TMOD, TM0_RUN);
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/* Configure for interval mode */
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CLR_REG( REG_TMOD, TM1_TOGGLE);
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/*
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* Load Timer data register with count down value.
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* count_down_val = CFG_SYS_CLK_FREQ/CFG_HZ
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*/
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PUT_REG( REG_TDATA0, (CFG_SYS_CLK_FREQ / CFG_HZ));
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/*
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* Enable global interrupt
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* Enable timer0 interrupt
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*/
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CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
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/* Start timer */
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SET_REG( REG_TMOD, TM0_RUN);
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#else
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#error No interrupt_init() defined for this CPU type
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#endif
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@ -294,40 +373,22 @@ void udelay_masked (unsigned long usec)
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#elif defined(CONFIG_S3C4510B)
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#define TMR_OFFSET (0x1000)
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ulong get_timer (ulong base)
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{
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return timestamp - base;
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}
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void udelay (unsigned long usec)
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{
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u32 rDATA;
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u32 ticks;
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rDATA = t_data_us(usec);
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ticks = (usec * CFG_HZ) / 1000000;
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/* Stop timer 0 */
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CLR_REG( REG_TMOD, TM0_RUN);
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ticks += get_timer (0);
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/* Configure for toggle mode */
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SET_REG( REG_TMOD, TM0_TOGGLE);
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while (get_timer (0) < ticks)
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/*NOP*/;
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/* Load Timer data register with count down value plus offset */
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PUT_REG( REG_TDATA0, rDATA + TMR_OFFSET);
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/* Clear timer counter register */
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PUT_REG( REG_TCNT0, 0x0);
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/* Start timer -- count down timer */
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SET_REG( REG_TMOD, TM0_RUN);
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/* spin during count down */
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while ( GET_REG( REG_TCNT0) > TMR_OFFSET);
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/* Stop timer */
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CLR_REG( REG_TMOD, TM0_RUN);
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}
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ulong get_timer (ulong base)
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{
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return (0xFFFFFFFF - GET_REG( REG_TCNT1)) - base;
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}
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#else
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@ -210,6 +210,11 @@
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#define PUT__U8(reg, val) (*((volatile u8 *)(reg)) = (( u8)((val)&0xFF)))
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#define GET__U8(reg) (*((volatile u8 *)(reg)))
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#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF))
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#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF)
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#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); }
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#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); }
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/***********************************/
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/* CLOCK CONSTANTS -- 50 MHz Clock */
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/***********************************/
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@ -228,4 +233,42 @@
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#define TM1_TOGGLE 0x10 /* 0, interval mode */
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#define TM1_OUT_1 0x20 /* Timer 0 Initial TOUT0 value */
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/*********************************/
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/* INTERRUPT SOURCES */
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/*********************************/
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#define INT_EXTINT0 0
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#define INT_EXTINT1 1
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#define INT_EXTINT2 2
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#define INT_EXTINT3 3
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#define INT_UARTTX0 4
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#define INT_UARTRX0 5
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#define INT_UARTTX1 6
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#define INT_UARTRX1 7
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#define INT_GDMA0 8
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#define INT_GDMA1 9
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#define INT_TIMER0 10
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#define INT_TIMER1 11
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#define INT_HDLCTXA 12
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#define INT_HDLCRXA 13
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#define INT_HDLCTXB 14
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#define INT_HDLCRXB 15
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#define INT_BDMATX 16
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#define INT_BDMARX 17
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#define INT_MACTX 18
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#define INT_MACRX 19
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#define INT_IIC 20
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#define INT_GLOBAL 21
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#define N_IRQS (21)
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#ifndef __ASSEMBLER__
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struct _irq_handler {
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void *m_data;
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void (*m_func)( void *data);
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};
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extern struct _irq_handler IRQ_HANDLER[];
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#endif
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#endif /* __S3C4510_h */
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File diff suppressed because it is too large
Load Diff
@ -44,7 +44,9 @@
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#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
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#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
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#undef CONFIG_USE_IRQ /* don't need them anymore */
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#define CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024)
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#define CONFIG_STACKSIZE_FIQ (4*1024)
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/*
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* Size of malloc() pool
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@ -63,7 +65,7 @@
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/*
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* select serial console configuration
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*/
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#define CONFIG_SERIAL1 2 /* we use Serial line 2, could also use 1 */
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#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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@ -83,10 +85,9 @@
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#define CONFIG_SERVERIP 10.0.0.1
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#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
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/*#define CONFIG_BOOTDELAY 10*/
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/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
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#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
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#define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
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#define CONFIG_BOOTDELAY 2
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#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
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/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
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@ -103,6 +104,10 @@
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CFG_MEMTEST_START 0x00000000 /* memtest works on */
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#define CFG_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
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@ -110,7 +115,8 @@
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#define CFG_LOAD_ADDR 0x00000000 /* default load address */
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#define CFG_HZ 50000000 /* decrementer freq: 50 MHz */
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#define CFG_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
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#define CFG_HZ 1000 /* decrementer freq: 1 KHz */
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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@ -159,6 +165,6 @@
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000) /* environment start address */
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#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
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#define CFG_ENV_SIZE 0x4000 /* max size for environment */
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#define CFG_ENV_SIZE 0x1000 /* max size for environment */
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#endif /* __CONFIG_H */
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@ -40,6 +40,7 @@
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP1610 1 /* which is in a 1610 */
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#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */
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#define CONFIG_MACH_OMAP_H2 /* Select board mach-type */
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/* input clock of PLL */
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/* the OMAP1610 H2 has 12MHz input clock */
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@ -40,6 +40,7 @@
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP1610 1 /* which is in a 1610 */
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#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
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#define CONFIG_MACH_OMAP_INNOVATOR /* Select board mach-type */
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/* input clock of PLL */
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/* the OMAP1610 Innovator has 12MHz input clock */
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@ -166,13 +166,13 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
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do_reset (cmdtp, flag, argc, argv);
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}
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#ifdef CONFIG_B2
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#if defined(CONFIG_B2) || defined(CONFIG_EVB4510)
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/*
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*we need to copy the ramdisk to SRAM to let Linux boot
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*/
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memmove ((void *) ntohl(hdr->ih_load), (uchar *)data, len);
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data = ntohl(hdr->ih_load);
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#endif /* CONFIG_B2 */
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#endif /* CONFIG_B2 || CONFIG_EVB4510 */
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/*
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* Now check if we have a multifile image
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