reset: socfpga: Poll for reset status after deassert reset
In Cyclone 5 SoC platform, the first USB probing is failed but second probing is success. DWC2 USB driver read gsnpsid register right after de-assert reset, but controller is not ready yet and it returns gsnpsid 0. Polling reset status after de-assert reset to solve the issue. Retry with this fix more than 10 times without issue. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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@ -18,6 +18,7 @@
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#include <dm/of_access.h>
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#include <env.h>
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#include <reset-uclass.h>
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#include <wait_bit.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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@ -80,7 +81,10 @@ static int socfpga_reset_deassert(struct reset_ctl *reset_ctl)
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int offset = id % (reg_width * BITS_PER_BYTE);
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clrbits_le32(data->modrst_base + (bank * BANK_INCREMENT), BIT(offset));
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return 0;
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return wait_for_bit_le32(data->modrst_base + (bank * BANK_INCREMENT),
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BIT(offset),
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false, 500, false);
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}
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static int socfpga_reset_request(struct reset_ctl *reset_ctl)
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