pinctrl: renesas: Fix r8a779{5,6,65} assign to GP7_03/02 of GPSR7
This patch is change the bit assignment of "HDMI1_CEC" to "GP7_03", and "HDMI0_CEC" to "GP7_02". This information was confirmed in the R-Car Gen3 Hardware Manual Rev.1.50. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -2,7 +2,7 @@
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/*
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* R8A7795 ES2.0+ processor support - PFC hardware block.
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*
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* Copyright (C) 2015-2016 Renesas Electronics Corporation
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* Copyright (C) 2015-2019 Renesas Electronics Corporation
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*/
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#include <common.h>
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@ -202,8 +202,8 @@
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#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20)
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/* GPSR7 */
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#define GPSR7_3 FM(HDMI1_CEC)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -588,8 +588,8 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS1),
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(CLKOUT),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(HDMI1_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(I2C_SEL_0_1),
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PINMUX_SINGLE(I2C_SEL_3_1),
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PINMUX_SINGLE(I2C_SEL_5_1),
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@ -2126,20 +2126,23 @@ static const unsigned int du_disp_mux[] = {
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DU_DISP_MARK,
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};
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/* - HDMI ------------------------------------------------------------------- */
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static const unsigned int hdmi0_cec_pins[] = {
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/* HDMI0_CEC */
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/* - GP7_02/03 -------------------------------------------------------------- */
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static const unsigned int gp7_02_pins[] = {
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/* GP7_02 */
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RCAR_GP_PIN(7, 2),
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};
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static const unsigned int hdmi0_cec_mux[] = {
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HDMI0_CEC_MARK,
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static const unsigned int gp7_02_mux[] = {
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GP7_02_MARK,
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};
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static const unsigned int hdmi1_cec_pins[] = {
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/* HDMI1_CEC */
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static const unsigned int gp7_03_pins[] = {
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/* GP7_03 */
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RCAR_GP_PIN(7, 3),
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};
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static const unsigned int hdmi1_cec_mux[] = {
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HDMI1_CEC_MARK,
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static const unsigned int gp7_03_mux[] = {
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GP7_03_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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@ -4230,8 +4233,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du_oddf),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(hdmi0_cec),
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SH_PFC_PIN_GROUP(hdmi1_cec),
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SH_PFC_PIN_GROUP(gp7_02),
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SH_PFC_PIN_GROUP(gp7_03),
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SH_PFC_PIN_GROUP(hscif0_data),
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SH_PFC_PIN_GROUP(hscif0_clk),
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SH_PFC_PIN_GROUP(hscif0_ctrl),
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@ -4613,12 +4616,12 @@ static const char * const du_groups[] = {
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"du_disp",
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};
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static const char * const hdmi0_groups[] = {
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"hdmi0_cec",
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static const char * const gp7_02_groups[] = {
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"gp7_02",
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};
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static const char * const hdmi1_groups[] = {
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"hdmi1_cec",
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static const char * const gp7_03_groups[] = {
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"gp7_03",
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};
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static const char * const hscif0_groups[] = {
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@ -5027,8 +5030,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(hdmi1),
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SH_PFC_FUNCTION(gp7_02),
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SH_PFC_FUNCTION(gp7_03),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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SH_PFC_FUNCTION(hscif2),
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@ -5749,8 +5752,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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} },
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@ -6004,8 +6007,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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} },
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@ -209,7 +209,7 @@
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/* GPSR7 */
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#define GPSR7_3 FM(GP7_03)
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#define GPSR7_2 FM(HDMI0_CEC)
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#define GPSR7_2 FM(GP7_02)
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#define GPSR7_1 FM(AVS2)
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#define GPSR7_0 FM(AVS1)
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@ -596,7 +596,7 @@ static const u16 pinmux_data[] = {
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PINMUX_SINGLE(AVS2),
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PINMUX_SINGLE(CLKOUT),
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PINMUX_SINGLE(GP7_03),
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PINMUX_SINGLE(HDMI0_CEC),
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PINMUX_SINGLE(GP7_02),
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PINMUX_SINGLE(MSIOF0_RXD),
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PINMUX_SINGLE(MSIOF0_SCK),
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PINMUX_SINGLE(MSIOF0_TXD),
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@ -2133,13 +2133,23 @@ static const unsigned int du_disp_mux[] = {
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DU_DISP_MARK,
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};
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/* - HDMI ------------------------------------------------------------------- */
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static const unsigned int hdmi0_cec_pins[] = {
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/* HDMI0_CEC */
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/* - GP7_02/03 -------------------------------------------------------------- */
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static const unsigned int gp7_02_pins[] = {
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/* GP7_02 */
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RCAR_GP_PIN(7, 2),
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};
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static const unsigned int hdmi0_cec_mux[] = {
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HDMI0_CEC_MARK,
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static const unsigned int gp7_02_mux[] = {
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GP7_02_MARK,
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};
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static const unsigned int gp7_03_pins[] = {
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/* GP7_03 */
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RCAR_GP_PIN(7, 3),
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};
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static const unsigned int gp7_03_mux[] = {
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GP7_03_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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@ -4200,7 +4210,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du_oddf),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(hdmi0_cec),
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SH_PFC_PIN_GROUP(gp7_02),
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SH_PFC_PIN_GROUP(gp7_03),
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SH_PFC_PIN_GROUP(hscif0_data),
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SH_PFC_PIN_GROUP(hscif0_clk),
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SH_PFC_PIN_GROUP(hscif0_ctrl),
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@ -4578,8 +4589,12 @@ static const char * const du_groups[] = {
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"du_disp",
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};
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static const char * const hdmi0_groups[] = {
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"hdmi0_cec",
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static const char * const gp7_02_groups[] = {
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"gp7_02",
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};
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static const char * const gp7_03_groups[] = {
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"gp7_03",
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};
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static const char * const hscif0_groups[] = {
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@ -4975,7 +4990,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(drif2),
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SH_PFC_FUNCTION(drif3),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(hdmi0),
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SH_PFC_FUNCTION(gp7_02),
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SH_PFC_FUNCTION(gp7_03),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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SH_PFC_FUNCTION(hscif2),
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@ -5692,7 +5708,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
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{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
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{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
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{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
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{ RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
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{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
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{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
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{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
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@ -5946,7 +5962,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
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[25] = RCAR_GP_PIN(0, 15), /* D15 */
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[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
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[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
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[28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
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[28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
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[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
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[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
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[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
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