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ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place

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The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
notion but rather "where is our previous stage loaded in memory?"
option.  Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
our HS builds that are not using SPL anyhow.

Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
This commit is contained in:
Tom Rini 2019-03-19 07:14:37 -04:00
parent 55f8b70fee
commit 9c4b0131d1
15 changed files with 26 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
arch/arm/Kconfig
View File

@ -1464,6 +1464,21 @@ config TI_SECURE_DEVICE
authenticated) and the code. See the doc/README.ti-secure
file for further details.
if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
config ISW_ENTRY_ADDR
hex "Address in memory or XIP address of bootloader entry point"
default 0x402F4000 if AM43XX
default 0x402F0400 if AM33XX
default 0x40301350 if OMAP54XX
help
After any reset, the boot ROM searches the boot media for a valid
boot image. For non-XIP devices, the ROM then copies the image into
internal memory. For all boot modes, after the ROM processes the
boot image it eventually computes the entry point address depending
on the device type (secure/non-secure), boot media (xip/non-xip) and
image headers.
endif
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"

15
arch/arm/mach-omap2/Kconfig
View File

@ -167,21 +167,6 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
using hardware memory firewalls. This value must be smaller than the
TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
if AM43XX || AM33XX || OMAP54XX
config ISW_ENTRY_ADDR
hex "Address in memory or XIP address of bootloader entry point"
default 0x402F4000 if AM43XX
default 0x402F0400 if AM33XX
default 0x40301350 if OMAP54XX
help
After any reset, the boot ROM searches the boot media for a valid
boot image. For non-XIP devices, the ROM then copies the image into
internal memory. For all boot modes, after the ROM processes the
boot image it eventually computes the entry point address depending
on the device type (secure/non-secure), boot media (xip/non-xip) and
image headers.
endif
source "arch/arm/mach-omap2/omap3/Kconfig"
source "arch/arm/mach-omap2/omap4/Kconfig"

1
configs/k2e_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y

1
configs/k2e_hs_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y

1
configs/k2g_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC0A0000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y

1
configs/k2g_hs_evm_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0xC0A0000
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_TARGET_K2G_EVM=y

1
configs/k2hk_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC200000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y

1
configs/k2hk_hs_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC200000
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y

1
configs/k2l_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y

1
configs/k2l_hs_evm_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_TEXT_BASE=0xC000060
CONFIG_TI_COMMON_CMD_OPTIONS=y

4
include/configs/k2e_evm.h
View File

@ -40,10 +40,6 @@
#include <configs/ti_armv7_keystone2.h>
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c100000
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */

3
include/configs/k2g_evm.h
View File

@ -72,9 +72,6 @@
"bootm ${fit_loadaddr}#${name_fdt}"
#endif
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c0a0000
/* NAND Configuration */
#define CONFIG_SYS_NAND_PAGE_2K

3
include/configs/k2hk_evm.h
View File

@ -40,9 +40,6 @@
#include <configs/ti_armv7_keystone2.h>
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c200000
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */

3
include/configs/k2l_evm.h
View File

@ -40,9 +40,6 @@
#include <configs/ti_armv7_keystone2.h>
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c100000
#define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS
/* NAND Configuration */

5
include/configs/ti_armv7_keystone2.h
View File

@ -22,7 +22,7 @@
/* Memory Configuration */
#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_ISW_ENTRY_ADDR - \
GENERATED_GBL_DATA_SIZE)
#ifdef CONFIG_SYS_MALLOC_F_LEN
@ -32,9 +32,10 @@
#endif
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
#define CONFIG_SPL_PAD_TO 65536
#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
#define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \
CONFIG_SPL_MAX_SIZE)
#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \