powerpc/T4240QDS/eth: some fix for XFI

XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs
of serdes2 are routed to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate the
10GBASE-KR scenario.

So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. For fiber cable, there is NO PHY, while
for copper cable, we need to use internal PHY which exist in Serdes to
do auto-negotiation and link training, which implemented in kernel.
We use hwconfig to define cable type for XFI, and fixup dtb based on the
cable type.

For copper cable, set below env in hwconfig:

fsl_10gkr_copper:<10g_mac_name>

the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The
four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports,
if a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.

For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:

fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2

For fiber cable:

1. give PHY address to a XFI port, otherwise, the XFI ports will not be
available in U-boot, there is no PHY physically for XFI when using fiber
cable, this is just to make U-boot happy and we can use the XFI ports
in U-boot.
2. fixup dtb to use fixed-link in case of fiber cable which has no PHY.
Kernel requests that a MAC must have a PHY or fixed-link.

When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface.

Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56
is not valid any longer.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Shaohui Xie 2014-08-13 18:19:15 +08:00 committed by York Sun
parent 2475367670
commit 9bf499ace8
3 changed files with 142 additions and 18 deletions

View File

@ -23,6 +23,7 @@
#include <phy.h>
#include <asm/fsl_dtsec.h>
#include <asm/fsl_serdes.h>
#include <hwconfig.h>
#include "../common/qixis.h"
#include "../common/fman.h"
@ -173,6 +174,10 @@ void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
enum fm_port port, int offset)
{
int interface = fm_info_get_enet_if(port);
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 prtcl2 = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
prtcl2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
if (interface == PHY_INTERFACE_MODE_SGMII ||
interface == PHY_INTERFACE_MODE_QSGMII) {
@ -262,6 +267,76 @@ void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
default:
break;
}
} else if (interface == PHY_INTERFACE_MODE_XGMII &&
((prtcl2 == 55) || (prtcl2 == 57))) {
/*
* if the 10G is XFI, check hwconfig to see what is the
* media type, there are two types, fiber or copper,
* fix the dtb accordingly.
*/
int media_type = 0;
struct fixed_link f_link;
char lane_mode[20] = {"10GBASE-KR"};
char buf[32] = "serdes-2,";
int off;
switch (port) {
case FM1_10GEC1:
if (hwconfig_sub("fsl_10gkr_copper", "fm1_10g1")) {
media_type = 1;
fdt_set_phy_handle(blob, prop, pa,
"phy_xfi1");
sprintf(buf, "%s%s%s", buf, "lane-a,",
(char *)lane_mode);
}
break;
case FM1_10GEC2:
if (hwconfig_sub("fsl_10gkr_copper", "fm1_10g2")) {
media_type = 1;
fdt_set_phy_handle(blob, prop, pa,
"phy_xfi2");
sprintf(buf, "%s%s%s", buf, "lane-b,",
(char *)lane_mode);
}
break;
case FM2_10GEC1:
if (hwconfig_sub("fsl_10gkr_copper", "fm2_10g1")) {
media_type = 1;
fdt_set_phy_handle(blob, prop, pa,
"phy_xfi3");
sprintf(buf, "%s%s%s", buf, "lane-d,",
(char *)lane_mode);
}
break;
case FM2_10GEC2:
if (hwconfig_sub("fsl_10gkr_copper", "fm2_10g2")) {
media_type = 1;
fdt_set_phy_handle(blob, prop, pa,
"phy_xfi4");
sprintf(buf, "%s%s%s", buf, "lane-c,",
(char *)lane_mode);
}
break;
default:
return;
}
if (!media_type) {
/* fixed-link is used for XFI fiber cable */
fdt_delprop(blob, offset, "phy-handle");
f_link.phy_id = port;
f_link.duplex = 1;
f_link.link_speed = 10000;
f_link.pause = 0;
f_link.asym_pause = 0;
fdt_setprop(blob, offset, "fixed-link", &f_link,
sizeof(f_link));
} else {
/* set property for copper cable */
off = fdt_node_offset_by_compat_reg(blob,
"fsl,fman-memac-mdio", pa + 0x1000);
fdt_setprop_string(blob, off, "lane-instance", buf);
}
}
}
@ -295,8 +370,23 @@ void fdt_fixup_board_enet(void *fdt)
break;
case PHY_INTERFACE_MODE_XGMII:
/* check if it's XFI interface for 10g */
if ((prtcl2 == 56) || (prtcl2 == 57)) {
fdt_status_okay_by_alias(fdt, "emi2_xfislot3");
if ((prtcl2 == 55) || (prtcl2 == 57)) {
if (i == FM1_10GEC1 && hwconfig_sub(
"fsl_10gkr_copper", "fm1_10g1"))
fdt_status_okay_by_alias(
fdt, "xfi_pcs_mdio1");
if (i == FM1_10GEC2 && hwconfig_sub(
"fsl_10gkr_copper", "fm1_10g2"))
fdt_status_okay_by_alias(
fdt, "xfi_pcs_mdio2");
if (i == FM2_10GEC1 && hwconfig_sub(
"fsl_10gkr_copper", "fm2_10g1"))
fdt_status_okay_by_alias(
fdt, "xfi_pcs_mdio3");
if (i == FM2_10GEC2 && hwconfig_sub(
"fsl_10gkr_copper", "fm2_10g2"))
fdt_status_okay_by_alias(
fdt, "xfi_pcs_mdio4");
break;
}
switch (i) {
@ -460,7 +550,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC4, slot_qsgmii_phyaddr[2][3]);
fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
if ((srds_prtcl_s2 != 55) && (srds_prtcl_s2 != 57)) {
fm_info_set_phy_address(FM1_DTSEC9,
slot_qsgmii_phyaddr[1][3]);
fm_info_set_phy_address(FM1_DTSEC10,
@ -475,7 +565,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC4, slot_qsgmii_phyaddr[2][3]);
fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
if ((srds_prtcl_s2 != 55) && (srds_prtcl_s2 != 57)) {
fm_info_set_phy_address(FM1_DTSEC9,
slot_qsgmii_phyaddr[1][2]);
fm_info_set_phy_address(FM1_DTSEC10,
@ -490,7 +580,7 @@ int board_eth_init(bd_t *bis)
case 48:
fm_info_set_phy_address(FM1_DTSEC5, slot_qsgmii_phyaddr[1][0]);
fm_info_set_phy_address(FM1_DTSEC6, slot_qsgmii_phyaddr[1][1]);
if ((srds_prtcl_s2 != 56) && (srds_prtcl_s2 != 57)) {
if ((srds_prtcl_s2 != 55) && (srds_prtcl_s2 != 57)) {
fm_info_set_phy_address(FM1_DTSEC10,
slot_qsgmii_phyaddr[1][2]);
fm_info_set_phy_address(FM1_DTSEC9,
@ -567,13 +657,18 @@ int board_eth_init(bd_t *bis)
idx = i - FM1_10GEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_XGMII:
lane = serdes_get_first_lane(FSL_SRDS_1,
if ((srds_prtcl_s2 == 55) || (srds_prtcl_s2 == 57)) {
/* A fake PHY address to make U-boot happy */
fm_info_set_phy_address(i, i);
} else {
lane = serdes_get_first_lane(FSL_SRDS_1,
XAUI_FM1_MAC9 + idx);
if (lane < 0)
break;
slot = lane_to_slot_fsm1[lane];
if (QIXIS_READ(present2) & (1 << (slot - 1)))
fm_disable_port(i);
if (lane < 0)
break;
slot = lane_to_slot_fsm1[lane];
if (QIXIS_READ(present2) & (1 << (slot - 1)))
fm_disable_port(i);
}
mdio_mux[i] = EMI2;
fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
break;
@ -666,7 +761,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM2_DTSEC3, slot_qsgmii_phyaddr[4][2]);
fm_info_set_phy_address(FM2_DTSEC4, slot_qsgmii_phyaddr[4][3]);
break;
case 56:
case 55:
case 57:
/* XFI in Slot3, SGMII in Slot4 */
fm_info_set_phy_address(FM2_DTSEC1, slot_qsgmii_phyaddr[4][0]);
@ -743,13 +838,18 @@ int board_eth_init(bd_t *bis)
idx = i - FM2_10GEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_XGMII:
lane = serdes_get_first_lane(FSL_SRDS_2,
if ((srds_prtcl_s2 == 55) || (srds_prtcl_s2 == 57)) {
/* A fake PHY address to make U-boot happy */
fm_info_set_phy_address(i, i);
} else {
lane = serdes_get_first_lane(FSL_SRDS_2,
XAUI_FM2_MAC9 + idx);
if (lane < 0)
break;
slot = lane_to_slot_fsm2[lane];
if (QIXIS_READ(present2) & (1 << (slot - 1)))
fm_disable_port(i);
if (lane < 0)
break;
slot = lane_to_slot_fsm2[lane];
if (QIXIS_READ(present2) & (1 << (slot - 1)))
fm_disable_port(i);
}
mdio_mux[i] = EMI2;
fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
break;

View File

@ -79,6 +79,25 @@ Board Features
- High-speed serial flash
Two Serial port
Four I2C ports
XFI
XFI is supported on T4QDS-XFI board which removed slot3 and routed
four Lanes A/B/C/D to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate
10GBASE-KR scenario.
So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. An hwconfig env "fsl_10gkr_copper" is
introduced to indicate a XFI port will use copper cable, and U-boot
will fixup the dtb accordingly.
It's used as: fsl_10gkr_copper:<10g_mac_name>
The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2, they
do not have to be coexist in hwconfig. If a MAC is listed in the env
"fsl_10gkr_copper", it will use copper cable, otherwise, fiber cable
will be used by default.
for ex. set "fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2" in
hwconfig, then both four XFI ports will use copper cable.
set "fsl_10gkr_copper:fm1_10g1,fm1_10g2" in hwconfig, then first two
XFI ports will use copper cable, the other two XFI ports will use fiber
cable.
Memory map
----------

View File

@ -71,6 +71,11 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
(is_serdes_configured(XFI_FM1_MAC10))))
return PHY_INTERFACE_MODE_XGMII;
if ((port == FM1_DTSEC9 || port == FM1_DTSEC10) &&
((is_serdes_configured(XFI_FM1_MAC9)) ||
(is_serdes_configured(XFI_FM1_MAC10))))
return PHY_INTERFACE_MODE_XGMII;
if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
((is_serdes_configured(XAUI_FM2_MAC9)) ||
(is_serdes_configured(XAUI_FM2_MAC10)) ||