dm: powerpc: P5040DS: add i2c DM support
This supports i2c DM for board P5040DS Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -3,7 +3,7 @@
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* P5040 Silicon/SoC Device Tree Source (pre include)
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* P5040 Silicon/SoC Device Tree Source (pre include)
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*
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*
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* Copyright 2012 - 2015 Freescale Semiconductor Inc.
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* Copyright 2012 - 2015 Freescale Semiconductor Inc.
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* Copyright 2019 NXP
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* Copyright 2019-2020 NXP
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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@ -85,6 +85,9 @@
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reg = <0x114000 0x1000>;
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reg = <0x114000 0x1000>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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/include/ "qoriq-i2c-0.dtsi"
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/include/ "qoriq-i2c-1.dtsi"
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};
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};
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pcie@ffe200000 {
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pcie@ffe200000 {
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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/*
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* Copyright 2009-2012 Freescale Semiconductor, Inc.
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* Copyright 2009-2012 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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*/
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*/
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/*
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/*
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@ -276,14 +277,19 @@
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#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
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#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
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/* I2C */
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/* I2C */
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_FSL
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#define CONFIG_SYS_FSL_I2C_SPEED 400000
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#define CONFIG_SYS_FSL_I2C_SPEED 400000
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#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
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#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
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#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
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#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
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#define CONFIG_SYS_FSL_I2C2_SPEED 400000
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#define CONFIG_SYS_FSL_I2C2_SPEED 400000
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#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
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#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
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#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
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#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
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#else
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#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
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#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
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#endif
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#define CONFIG_SYS_I2C_FSL
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/*
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/*
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* RapidIO
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* RapidIO
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