rockchip: puma: reorganize devicetrees to actually work and match upstream
So far the puma dts files only just included the main puma dtsi without handling the actual baseboard and rk3399-puma.dtsi was very much detached from the variant in the mainline Linux kernel. Recent changes resulted in a strange situation with nonworking puma boards. Commitab800e5a6f
("arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi") moved the sdram include from rk3399-puma-ddrX.dts to new files rk3399-puma-ddrx-u-boot.dtsi which were never included anywhere though. Commit167efc2c7a
("arm64: dts: rk3399: Sync v5.7-rc1 from Linux") replaced the rk3399-puma.dtsi nearly completely, but in the kernel it definitly depends on a baseboard dts to actually enable peripherals like sd-slot, uarts, etc. So to untagle this and bring the whole thing more in line with mainline Linux, bring the rk3399-puma-haikou.dts over as well, drop the separate DDR-option devicetrees and instead replace them with a puma Kconfig option to select and include the needed DDR variant. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -131,9 +131,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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rk3399-nanopi-neo4.dtb \
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rk3399-orangepi.dtb \
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rk3399-pinebook-pro.dtb \
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rk3399-puma-ddr1333.dtb \
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rk3399-puma-ddr1600.dtb \
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rk3399-puma-ddr1866.dtb \
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rk3399-puma-haikou.dtb \
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rk3399-roc-pc.dtb \
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rk3399-roc-pc-mezzanine.dtb \
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rk3399-rock-pi-4.dtb \
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@ -1,4 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include "rk3399-puma-u-boot.dtsi"
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#include "rk3399-sdram-ddr3-1333.dtsi"
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@ -1,8 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3399-puma.dtsi"
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@ -1,4 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include "rk3399-puma-u-boot.dtsi"
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#include "rk3399-sdram-ddr3-1600.dtsi"
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@ -1,9 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3399-puma.dtsi"
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#include "rk3399-u-boot.dtsi"
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@ -1,4 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include "rk3399-puma-u-boot.dtsi"
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#include "rk3399-sdram-ddr3-1866.dtsi"
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@ -1,8 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3399-puma.dtsi"
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@ -1,6 +1,17 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include "rk3399-u-boot.dtsi"
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#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1333
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#include "rk3399-sdram-ddr3-1333.dtsi"
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#endif
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#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1600
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#include "rk3399-sdram-ddr3-1600.dtsi"
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#endif
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#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1866
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#include "rk3399-sdram-ddr3-1866.dtsi"
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#endif
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/ {
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config {
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u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
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271
arch/arm/dts/rk3399-puma-haikou.dts
Normal file
271
arch/arm/dts/rk3399-puma-haikou.dts
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@ -0,0 +1,271 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "rk3399-puma.dtsi"
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/ {
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model = "Theobroma Systems RK3399-Q7 SoM";
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compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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pinctrl-0 = <&led_pin_module>, <&led_sd_haikou>;
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sd-card-led {
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label = "sd_card_led";
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gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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};
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};
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i2s0-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "Haikou,I2S-codec";
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simple-audio-card,mclk-fs = <512>;
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simple-audio-card,codec {
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clocks = <&sgtl5000_clk>;
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sound-dai = <&sgtl5000>;
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};
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simple-audio-card,cpu {
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bitclock-master;
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frame-master;
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sound-dai = <&i2s0>;
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};
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};
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sgtl5000_clk: sgtl5000-oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc3v3_baseboard: vcc3v3-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_baseboard: vcc5v0-baseboard {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_baseboard";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&otg_vbus_drv>;
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regulator-name = "vcc5v0_otg";
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regulator-always-on;
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};
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vdda_codec: vdda-codec {
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compatible = "regulator-fixed";
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regulator-name = "vdda_codec";
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v0_baseboard>;
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};
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vddd_codec: vddd-codec {
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compatible = "regulator-fixed";
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regulator-name = "vddd_codec";
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regulator-boot-on;
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <1600000>;
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vin-supply = <&vcc5v0_baseboard>;
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};
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};
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&hdmi {
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ddc-i2c-bus = <&i2c3>;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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};
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&i2c3 {
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i2c-scl-rising-time-ns = <450>;
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i2c-scl-falling-time-ns = <15>;
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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sgtl5000: codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&sgtl5000_clk>;
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#sound-dai-cells = <0>;
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VDDA-supply = <&vdda_codec>;
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VDDIO-supply = <&vdda_codec>;
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VDDD-supply = <&vddd_codec>;
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status = "okay";
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};
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};
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&i2c6 {
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status = "okay";
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clock-frequency = <400000>;
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};
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&pcie_phy {
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status = "okay";
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};
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&pcie0 {
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ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_clkreqn_cpm>;
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status = "okay";
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};
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&haikou_pin_hog>;
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hog {
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haikou_pin_hog: haikou-pin-hog {
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rockchip,pins =
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/* LID_BTN */
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<0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
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/* BATLOW# */
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<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
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/* SLP_BTN# */
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<0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
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/* BIOS_DISABLE# */
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<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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leds {
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led_sd_haikou: led-sd-gpio {
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rockchip,pins =
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<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb2 {
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otg_vbus_drv: otg-vbus-drv {
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rockchip,pins =
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<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&pwm0 {
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
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disable-wp;
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max-frequency = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
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vmmc-supply = <&vcc3v3_baseboard>;
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status = "okay";
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};
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&spi5 {
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status = "okay";
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};
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&tcphy0 {
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status = "okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&usbdrd3_0 {
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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dr_mode = "otg";
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status = "okay";
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};
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&u2phy0_host {
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phy-supply = <&vcc5v0_otg>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&vopb {
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status = "okay";
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};
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&vopb_mmu {
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status = "okay";
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};
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&vopl {
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status = "okay";
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};
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&vopl_mmu {
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status = "okay";
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};
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@ -18,4 +18,19 @@ config ENV_SIZE
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config ENV_OFFSET
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default 0x3fc000 if ENV_IS_IN_SPI_FLASH
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choice
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prompt "Theobroma Systems RK3399-Q7 DDR Option"
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default TARGET_PUMA_RK3399_RAM_DDR3_1333
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config TARGET_PUMA_RK3399_RAM_DDR3_1333
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bool "DDR3-1333MHz"
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config TARGET_PUMA_RK3399_RAM_DDR3_1600
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bool "DDR3-1600MHz"
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config TARGET_PUMA_RK3399_RAM_DDR3_1866
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bool "DDR3-1866MHz"
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endchoice
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endif
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@ -39,7 +39,7 @@ CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600"
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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