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pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength

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RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
David Wu 2019-04-16 21:56:34 +08:00 committed by Kever Yang
parent 625ab11fda
commit 956362c84b
1 changed files with 9 additions and 2 deletions
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11
drivers/pinctrl/rockchip/pinctrl-rk3288.c
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@ -143,8 +143,15 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank,
return ret;
}
/* enable the write to the equivalent lower bits */
data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
/* bank0 is special, there are no higher 16 bit writing bits. */
if (bank->bank_num == 0) {
regmap_read(regmap, reg, &data);
data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit);
} else {
/* enable the write to the equivalent lower bits */
data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16);
}
data |= (ret << bit);
ret = regmap_write(regmap, reg, data);
return ret;