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imx31_phycore: Fix build by using new relocation scheme

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Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2011-06-11 15:16:11 +00:00 committed by Albert ARIBAUD
parent e845f9006a
commit 953ee4d09e
3 changed files with 25 additions and 8 deletions
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1
board/imx31_phycore/config.mk
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@ -1 +0,0 @@
CONFIG_SYS_TEXT_BASE = 0x87f00000

20
board/imx31_phycore/imx31_phycore.c
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@ -30,15 +30,24 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
int dram_init (void) int dram_init(void)
{ {
gd->bd->bi_dram[0].start = PHYS_SDRAM_1; /* dram_init must store complete ramsize in gd->ram_size */
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
PHYS_SDRAM_1_SIZE);
return 0;
}
int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_PCM037; /* board id for linux */
gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
return 0; return 0;
} }
int board_init (void) int board_early_init_f(void)
{ {
__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */ __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
__REG(CSCR_L(0)) = 0x10000d03; __REG(CSCR_L(0)) = 0x10000d03;
@ -62,9 +71,6 @@ int board_init (void)
mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL); mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL);
mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SDA); mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SDA);
gd->bd->bi_arch_number = MACH_TYPE_PCM037; /* board id for linux */
gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
return 0; return 0;
} }

12
include/configs/imx31_phycore.h
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@ -28,6 +28,8 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#include <asm/arch/imx-regs.h>
/* High Level Configuration Options */ /* High Level Configuration Options */
#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
#define CONFIG_MX31 1 /* in a mx31 */ #define CONFIG_MX31 1 /* in a mx31 */
@ -143,6 +145,16 @@
#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_TEXT_BASE 0xA0000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET)
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* FLASH and environment organization * FLASH and environment organization