x86: ich-spi: Remove spi_write_protect_region()
This routine is not called anywhere. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -539,56 +539,6 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
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return 0;
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}
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/*
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* This uses the SPI controller from the Intel Cougar Point and Panther Point
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* PCH to write-protect portions of the SPI flash until reboot. The changes
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* don't actually take effect until the HSFS[FLOCKDN] bit is set, but that's
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* done elsewhere.
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*/
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int spi_write_protect_region(struct udevice *dev, uint32_t lower_limit,
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uint32_t length, int hint)
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{
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struct udevice *bus = dev->parent;
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struct ich_spi_priv *ctlr = dev_get_priv(bus);
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uint32_t tmplong;
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uint32_t upper_limit;
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if (!ctlr->pr) {
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printf("%s: operation not supported on this chipset\n",
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__func__);
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return -ENOSYS;
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}
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if (length == 0 ||
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lower_limit > (0xFFFFFFFFUL - length) + 1 ||
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hint < 0 || hint > 4) {
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printf("%s(0x%x, 0x%x, %d): invalid args\n", __func__,
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lower_limit, length, hint);
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return -EPERM;
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}
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upper_limit = lower_limit + length - 1;
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/*
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* Determine bits to write, as follows:
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* 31 Write-protection enable (includes erase operation)
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* 30:29 reserved
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* 28:16 Upper Limit (FLA address bits 24:12, with 11:0 == 0xfff)
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* 15 Read-protection enable
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* 14:13 reserved
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* 12:0 Lower Limit (FLA address bits 24:12, with 11:0 == 0x000)
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*/
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tmplong = 0x80000000 |
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((upper_limit & 0x01fff000) << 4) |
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((lower_limit & 0x01fff000) >> 12);
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printf("%s: writing 0x%08x to %p\n", __func__, tmplong,
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&ctlr->pr[hint]);
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ctlr->pr[hint] = tmplong;
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return 0;
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}
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static int ich_spi_probe(struct udevice *dev)
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{
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struct ich_spi_platdata *plat = dev_get_platdata(dev);
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