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ARM: IGEP0033: Update timing to run DDR at 400MHz.

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We can run the DDR at 400MHz, so update the timings for that purpose.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
This commit is contained in:
Enric Balletbo i Serra 2013-09-10 11:12:26 +02:00 committed by Tom Rini
parent e3cf969205
commit 94b32f60fe
2 changed files with 14 additions and 14 deletions
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24
arch/arm/include/asm/arch-am33xx/ddr_defs.h
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@ -110,20 +110,20 @@
#define MT41J512M8RH125_IOCTRL_VALUE 0x18B #define MT41J512M8RH125_IOCTRL_VALUE 0x18B
/* Samsung K4B2G1646E-BIH9 */ /* Samsung K4B2G1646E-BIH9 */
#define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x06 #define K4B2G1646EBIH9_EMIF_READ_LATENCY 0x07
#define K4B2G1646EBIH9_EMIF_TIM1 0x0888A39B #define K4B2G1646EBIH9_EMIF_TIM1 0x0AAAE51B
#define K4B2G1646EBIH9_EMIF_TIM2 0x2A04011A #define K4B2G1646EBIH9_EMIF_TIM2 0x2A1D7FDA
#define K4B2G1646EBIH9_EMIF_TIM3 0x501F820F #define K4B2G1646EBIH9_EMIF_TIM3 0x501F83FF
#define K4B2G1646EBIH9_EMIF_SDCFG 0x61C24AB2 #define K4B2G1646EBIH9_EMIF_SDCFG 0x61C052B2
#define K4B2G1646EBIH9_EMIF_SDREF 0x0000093B #define K4B2G1646EBIH9_EMIF_SDREF 0x00000C30
#define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4 #define K4B2G1646EBIH9_ZQ_CFG 0x50074BE4
#define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1 #define K4B2G1646EBIH9_DLL_LOCK_DIFF 0x1
#define K4B2G1646EBIH9_RATIO 0x40 #define K4B2G1646EBIH9_RATIO 0x80
#define K4B2G1646EBIH9_INVERT_CLKOUT 0x1 #define K4B2G1646EBIH9_INVERT_CLKOUT 0x0
#define K4B2G1646EBIH9_RD_DQS 0x3B #define K4B2G1646EBIH9_RD_DQS 0x35
#define K4B2G1646EBIH9_WR_DQS 0x85 #define K4B2G1646EBIH9_WR_DQS 0x3A
#define K4B2G1646EBIH9_PHY_FIFO_WE 0x100 #define K4B2G1646EBIH9_PHY_FIFO_WE 0x97
#define K4B2G1646EBIH9_PHY_WR_DATA 0xC1 #define K4B2G1646EBIH9_PHY_WR_DATA 0x76
#define K4B2G1646EBIH9_IOCTRL_VALUE 0x18B #define K4B2G1646EBIH9_IOCTRL_VALUE 0x18B
/** /**

4
board/isee/igep0033/board.c
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@ -64,7 +64,7 @@ static struct emif_regs ddr3_emif_reg_data = {
#define OSC (V_OSCK/1000000) #define OSC (V_OSCK/1000000)
const struct dpll_params dpll_ddr = { const struct dpll_params dpll_ddr = {
303, OSC-1, 1, -1, -1, -1, -1}; 400, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params *get_dpll_ddr_params(void) const struct dpll_params *get_dpll_ddr_params(void)
{ {
@ -83,7 +83,7 @@ void set_mux_conf_regs(void)
void sdram_init(void) void sdram_init(void)
{ {
config_ddr(303, K4B2G1646EBIH9_IOCTRL_VALUE, &ddr3_data, config_ddr(400, K4B2G1646EBIH9_IOCTRL_VALUE, &ddr3_data,
&ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
} }
#endif #endif