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Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"

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This reverts commit b63b46313e.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Goldschmidt Simon 2018-01-24 10:44:05 +05:30 committed by Jagan Teki
parent c58f300628
commit 948ad4f075
1 changed files with 10 additions and 16 deletions
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26
drivers/spi/cadence_qspi_apb.c
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@ -627,8 +627,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
{
unsigned int remaining = n_rx;
unsigned int bytes_to_read = 0;
struct bounce_buffer bb;
u8 *bb_rxbuf;
int ret;
writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES);
@ -637,11 +635,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
writel(CQSPI_REG_INDIRECTRD_START,
plat->regbase + CQSPI_REG_INDIRECTRD);
ret = bounce_buffer_start(&bb, (void *)rxbuf, n_rx, GEN_BB_WRITE);
if (ret)
return ret;
bb_rxbuf = bb.bounce_buffer;
while (remaining > 0) {
ret = cadence_qspi_wait_for_data(plat);
if (ret < 0) {
@ -655,13 +648,16 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
bytes_to_read *= plat->fifo_width;
bytes_to_read = bytes_to_read > remaining ?
remaining : bytes_to_read;
readsl(plat->ahbbase, bb_rxbuf, bytes_to_read >> 2);
if (bytes_to_read % 4)
readsb(plat->ahbbase,
bb_rxbuf + rounddown(bytes_to_read, 4),
bytes_to_read % 4);
bb_rxbuf += bytes_to_read;
/*
* Handle non-4-byte aligned access to avoid
* data abort.
*/
if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4))
readsb(plat->ahbbase, rxbuf, bytes_to_read);
else
readsl(plat->ahbbase, rxbuf,
bytes_to_read >> 2);
rxbuf += bytes_to_read;
remaining -= bytes_to_read;
bytes_to_read = cadence_qspi_get_rd_sram_level(plat);
}
@ -678,7 +674,6 @@ int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
/* Clear indirect completion status */
writel(CQSPI_REG_INDIRECTRD_DONE,
plat->regbase + CQSPI_REG_INDIRECTRD);
bounce_buffer_stop(&bb);
return 0;
@ -686,7 +681,6 @@ failrd:
/* Cancel the indirect read */
writel(CQSPI_REG_INDIRECTRD_CANCEL,
plat->regbase + CQSPI_REG_INDIRECTRD);
bounce_buffer_stop(&bb);
return ret;
}