mx6sabreauto: Convert to DM_ETH
This fixes the following warning: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
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@ -22,7 +22,6 @@
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#include <mmc.h>
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#include <fsl_esdhc_imx.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/sys_proto.h>
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#include <i2c.h>
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#include <input.h>
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@ -76,23 +75,6 @@ static iomux_v3_cfg_t const uart4_pads[] = {
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IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
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};
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static iomux_v3_cfg_t const enet_pads[] = {
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IOMUX_PADS(PAD_KEY_COL1__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_KEY_COL2__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
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};
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/* I2C2 PMIC, iPod, Tuner, Codec, Touch, HDMI EDID, MIPI CSI2 card */
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static struct i2c_pads_info mx6q_i2c_pad_info1 = {
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@ -259,10 +241,6 @@ static void setup_iomux_eimnor(void)
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}
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#endif
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static void setup_iomux_enet(void)
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{
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SETUP_IOMUX_PADS(enet_pads);
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}
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static iomux_v3_cfg_t const usdhc3_pads[] = {
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IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
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@ -340,26 +318,6 @@ static void setup_gpmi_nand(void)
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}
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#endif
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static void setup_fec(void)
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{
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if (is_mx6dqp()) {
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/*
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* select ENET MAC0 TX clock from PLL
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*/
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imx_iomux_set_gpr_register(5, 9, 1, 1);
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enable_fec_anatop_clock(0, ENET_125MHZ);
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}
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setup_iomux_enet();
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}
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int board_eth_init(bd_t *bis)
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{
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setup_fec();
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return cpu_eth_init(bis);
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}
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u32 get_board_rev(void)
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{
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int rev = nxp_board_rev();
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@ -97,3 +97,8 @@ CONFIG_DM_VIDEO=y
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# CONFIG_VIDEO_BPP32 is not set
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CONFIG_SYS_WHITE_ON_BLACK=y
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CONFIG_VIDEO_IPUV3=y
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CONFIG_FEC_MXC=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_RGMII=y
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@ -75,12 +75,4 @@
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 1
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#define CONFIG_PHY_ATHEROS
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#endif /* __MX6SABREAUTO_CONFIG_H */
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