arm: rmobile: rcar: Stop clock prior to booting kernel
This stops clock except INTC-RT, MSIF, INTC-SYS, IRQC and SCIF before kernel boots. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -16,12 +16,44 @@
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#define TSTR0 0x04
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#define TSTR0_STR0 0x01
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#define TMU0_MSTP125 (1 << 25)
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static struct mstp_ctl mstptbl[] = {
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{ SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA,
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RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA },
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{ SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA,
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RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA },
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{ SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA,
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RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA },
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{ SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA,
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RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA },
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{ SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA,
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RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA },
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{ SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA,
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RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA },
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/* No MSTP6 */
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{ SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA,
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RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA },
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{ SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA,
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RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA },
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{ SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA,
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RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA },
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{ SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA,
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RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA },
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{ SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA,
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RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA },
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};
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void arch_preboot_os(void)
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{
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int i;
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/* stop TMU0 */
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mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
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/* Disable TMU0 */
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mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
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/* Stop module clock */
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for (i = 0; i < ARRAY_SIZE(mstptbl); i++) {
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mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis,
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mstptbl[i].s_ena);
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mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis,
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mstptbl[i].r_ena);
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}
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}
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@ -95,4 +95,14 @@
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#define CONFIG_USB_EHCI_RMOBILE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* MSIF */
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#define CONFIG_SMSTP2_ENA 0x00002000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF2 */
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#define CONFIG_SMSTP7_ENA 0x00080000
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#endif /* __ALT_H */
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@ -91,4 +91,14 @@
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#define CONFIG_USB_EHCI_RMOBILE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* MSIF */
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#define CONFIG_SMSTP2_ENA 0x00002000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF0 */
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#define CONFIG_SMSTP7_ENA 0x00200000
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#endif /* __GOSE_H */
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@ -92,4 +92,15 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_USB_STORAGE
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* MSIF*/
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#define CONFIG_SMSTP2_ENA 0x00002000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF0 */
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#define CONFIG_SMSTP7_ENA 0x00200000
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#endif /* __KOELSCH_H */
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@ -93,4 +93,14 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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#define CONFIG_USB_STORAGE
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/* Module stop status bits */
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/* INTC-RT */
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#define CONFIG_SMSTP0_ENA 0x00400000
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/* MSIF */
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#define CONFIG_SMSTP2_ENA 0x00002000
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/* INTC-SYS, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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/* SCIF0 */
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#define CONFIG_SMSTP7_ENA 0x00200000
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#endif /* __LAGER_H */
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